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ON Semiconductor - 1.5A DDR Memory Termination Regulator

Numéro de référence NCV51198
Description 1.5A DDR Memory Termination Regulator
Fabricant ON Semiconductor 
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NCV51198 fiche technique
NCP51198, NCV51198
1.5A DDR Memory
Termination Regulator
The NCP/NCV51198 is a simple, cost−effective, high−speed linear
regulator designed to generate the VTT termination voltage rail for
DDR−I, DDR−II and DDR−III memory. The regulator is capable of
actively sourcing or sinking up to ±1.5 A for DDR−I, or up to ±0.5 A
for DDR−II /−III while regulating the output voltage to within
±30 mV.
The output termination voltage is tightly regulated to track VTT =
(VDDQ / 2) over the entire current range.
The NCP/NCV51198 incorporates a high−speed differential
amplifier to provide ultra−fast response to line and load transients.
Other features include extremely low initial offset voltage, excellent
load regulation, source/sink soft−start and on−chip thermal shut−down
protection.
The NCP/NCV51198 features the power−saving Suspend To Ram
(STR) function which will tri−state the regulator output and lower the
quiescent current drawn when the /SS pin is pulled low.
The NCP/NCV51198 is available in a SOIC−8 Exposed Pad
package.
Features
Generate DDR Memory Termination Voltage (VTT)
For DDR−I, DDR−II, DDR−III Source / Sink Currents
Supports DDR−I to ±1.5 A, DDR−II to ±0.5 A (peak)
Integrated Power MOSFETs with Thermal Protection
Stable with 10 mF Ceramic VTT Capacitor
High Accuracy Output Voltage at Full−Load
Minimal External Component Count
Shutdown for Standby or Suspend to RAM (STR) mode
Built−in Soft Start
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
Appications
Desktop PC’s, Notebooks, and Workstations
Graphics Card DDR Memory Termination
Set Top Boxes, Digital TV’s, Printers
Embedded Systems
Active Bus Termination
www.onsemi.com
MARKING
DIAGRAM
8
1
SOIC8−NB EP
PD SUFFIX
CASE 751BU
XXXXXX
AYWWG
G
XXXXXX = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
PIN CONNECTION
1
GND
8
/SS
VTTS
VREF
SOIC−8 EP
VTT
PVCC
VCC
VDDQ
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. 3
1
Publication Order Number:
NCP51198/D

PagesPages 9
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