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PDF TC7109 Data sheet ( Hoja de datos )
| Número de pieza | TC7109 | |
| Descripción | Analog-to-Digital Converters | |
| Fabricantes | Microchip | |
| Logotipo |  |
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TC7109/A
12-Bit μA-Compatible Analog-to-Digital Converters
Features:
• Zero Integrator Cycle for Fast Recovery from
Input Overloads
• Eliminates Cross-Talk in Multiplexed Systems
• 12-Bit Plus Sign Integrating A/D Converter with
Over Range Indication
• Sign Magnitude Coding Format
• True Differential Signal Input and Differential
Reference Input
• Low Noise: 15μVP-P Typ.
• Input Current: 1pA Typ.
• No Zero Adjustment needed
• TTL Compatible, Byte Organized Tri-State
Outputs
• UART Handshake Mode for simple Serial Data
Transmissions
Device Selection Table
Part Number
(TC7109X)*
Package
Temperature
Range
TC7109CKW
TC7109CLW
TC7109CPL
TC7109IJL
44-Pin PQFP
44-Pin PLCC
40-Pin PDIP
40-Pin CERDIP
0°C to +70°C
0°C to +70°C
0°C to +70°C
-25°C to +85°C
*The “A” version has a higher IOUT on the digital lines.
General Description:
The TC7109A is a 12-bit plus sign, CMOS low power
Analog-to-Digital Converter (ADC). Only eight passive
components and a crystal are required to form a
complete dual slope integrating ADC.
The improved VOH source current and other TC7109A
features make it an attractive per-channel alternative to
analog multiplexing for many data acquisition applica-
tions. These features include typical input bias current
of 1pA, drift of less than 1μV/°C, input noise typically
15μVP-P, and auto-zero. True differential input and ref-
erence allow measurement of bridge type transducers,
such as load cells, strain gauges and temperature
transducers.
The TC7109A provides a versatile digital interface. In
the Direct mode, Chip Select and HIGH/LOW byte
enable control parallel bus interface. In the Handshake
mode, the TC7109A will operate with industry standard
UARTs in controlling serial data transmission – ideal for
remote data logging. Control and monitoring of conver-
sion timing is provided by the RUN/HOLD input and
Status output.
For applications requiring more resolution, see the
TC500, 15-bit plus sign ADC data sheet. The TC7109A
has improved over range recovery performance and
higher output drive capability than the original TC7109.
All new (or existing) designs should specify the
TC7109A wherever possible.
© 2006 Microchip Technology Inc.
DS21456C-page 1
1 page  
TC7109/A
TC7109/TC7109A ELECTRICAL SPECIFICATIONS (Continued)
Electrical Characteristics: All parameters with V+ = +5V, V- = -5V, GND = 0V, TA = +25°C, unless otherwise indicated.
Symbol
Parameter
Min Typ
Max
Unit
Test Conditions
TCFS Scale Factor Temperature Coefficient
I+ Supply Current (V+ to GND)
IS
VREF
Supply Current (V+ to V-)
Reference Out Voltage
TCREF Ref Out Temperature Coefficient
Digital
VOH
Output High Voltage
IOUT = 700μA
VOL Output Low Voltage
Output Leakage Current
Control I/O Pull-up Current
—1
5
— 700 1500
— 700 1500
-2.4 -2.8 -3.2
— 80
—
3.5 4.3
—
— 0.2 0.4
— ±0.01 ±1
—5
—
μV/°C
μA
μA
V
ppm/°C
V
μA
μA
μF
VIN = 408.9mV = >77708
Reading, Ext Ref = 0ppm/°C
VIN = 0V, Crystal Oscillator
3.58MHz Test Circuit
Pins 2-21, 25, 26, 27, 29 Open
Referenced to V+, 25kΩ
Between V+ and Ref Out
25kΩ Between V+ and Ref Out
0°C ≤ TA ≤ +70°C
TC7109: IOUT = 100μA
Pins 3 -16, 18, 19, 20
TC7109A: IOUT = 700μA
IOUT = 1.6mA
Pins 3 -16 High-Impedance
Pins 18, 19, 20 VOUT = V+ – 3V
Mode Input at GND
Control I/O Loading
— — 50
pF HBEN, Pin 19; LBEN, Pin 18
VIH
VIL
tW
Note
Input High Voltage
2.5 —
—
V Pins 18 -21, 26, 27
Referenced to GND
Input Low Voltage
——
1
V Pins 18-21, 26, 27
Referenced to GND
Input Pull-up Current
Input Pull-down Current
—5
— 25
—1
—
—
—
μA Pins 26, 27; VOUT = V+ – 3V
μA Pins 17, 24; VOUT = V+ – 3V
μA Pins 21, VOUT = GND = +3V
Oscillator Output Current, High
—1 —
mA VOUT – 2.5V
Oscillator Output Current, Low
— 1.5
—
mA VOUT – 2.5V
Buffered Oscillator Output Current High —
2
—
mA VOUT – 2.5V
Buffered Oscillator Output Current Low
—
5
—
mA VOUT – 2.5V
Mode Input Pulse Width
60 —
—
nsec
1: Input voltages may exceed supply voltages if input current is limited to ±100μA.
2: Connecting any digital inputs or outputs to voltages greater than V+ or less than GND may cause destructive device
latch-up. Therefore, it is recommended that inputs from sources other than the same power supply should not be applied
to the TC7109A before its power supply is established. In multiple supply systems, the supply to the device should be
activated first.
3: This limit refers to that of the package and will not occur during normal operation.
HANDLING PRECAUTIONS: These devices are CMOS and must be handled correctly to prevent damage. Package
and store only in conductive foam, antistatic tubes, or other conducting material. Use proper antistatic handling pro-
cedures. Do not connect in circuits under “power-on” conditions, as high transients may cause permanent damage.
© 2006 Microchip Technology Inc.
DS21456C-page 5
5 Page 
TC7109/A
Integrator Output
Internal Clock
Internal Latch
Status Output
RUN/HOLD Input
Determinated at
Zero Crossing
Detection
Auto-Zero Phase I
Min 1790 Counts
Max 2041 Counts
Static in
Hold State
INT
Phase II
7 Counts
*
*Note: RUN/HOLD input is ignored until end of auto-zero phase.
FIGURE 3-3:
TC7109A RUN/HOLD Operation
3.2.4 DIRECT MODE
The data outputs (bits 1 through 8, low order bytes; bits
9 through 12, polarity and over range high order bytes)
are accessible under control of the byte and chip
enable terminals as inputs, with the MODE pin at a
LOW level. These three inputs are all active LOW.
Internal pull-up resistors are provided for an inactive
HIGH level when left open. When chip enable is LOW,
a byte enable input LOW will allow the outputs of the
byte to become active. A variety of parallel data
accessing techniques may be used, as shown in the
“Interfacing” section. (See Figure 3-4 and Table 3-1.)
The access of data should be synchronized with the
conversion cycle by monitoring the Status output. This
prevents accessing data while it is being updated and
eliminates the acquisition of erroneous data.
CE/LOAD
As Input
HBEN
As Input
LBEN
As Input
High Byte
Data
Low Byte
Data
tBEA
tCEA
tDAB
Data
Valid
tDAB
tDAC
= High-Impedance
Data
Valid
Data
Valid
tDHC
TABLE 3-1: TC7109A DIRECT MODE
TIMING REQUIREMENTS
Symbol
Description
Min Typ Max Units
tBEA
tDAB
tDHB
tCEA
tDAC
tDHC
Byte Enable Width
Data Access Time
from Byte Enable
Data Hold Time
from Byte Enable
Chip Enable Width
Data Access Time
from Chip Enable
Data Hold Time
from Chip Enable
200 500 — nsec
— 150 300 nsec
— 150 300 nsec
300 500
nsec
— 200 400 nsec
— 200 400 nsec
3.2.5 HANDSHAKE MODE
An alternative means of interfacing the TC7109A to
digital systems is provided when the Handshake Out-
put mode of the TC7109A becomes active in controlling
the flow of data, instead of passively responding to chip
and byte enable inputs. This mode allows a direct inter-
face between the TC7109A and industry standard
UARTs with no external logic required. The TC7109A
provides all the control and flag signals necessary to
sequence the two bytes of data into the UART and ini-
tiate their transmission in serial form when triggered
into the Handshake mode. The cost of designing
remote data acquisition stations is reduced using serial
data transmission to minimize the number of lines to
the central controlling processor.
FIGURE 3-4:
Output Timing
TC7109A Direct Mode
© 2006 Microchip Technology Inc.
DS21456C-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TC7109.PDF ] | |
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