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TC74VHC125FN fiches techniques PDF

Toshiba - QUAD BUS BUFFER

Numéro de référence TC74VHC125FN
Description QUAD BUS BUFFER
Fabricant Toshiba 
Logo Toshiba 





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TC74VHC125FN fiche technique
TC74VHC125,126F/FN/FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC125F,TC74VHC125FN,TC74VHC125FT,TC74VHC125FK
TC74VHC126F,TC74VHC126FN,TC74VHC126FT,TC74VHC126FK
TC74VHC125F/FN/FT/FK Quad Bus Buffer
TC74VHC126F/FN/FT/FK Quad Bus Buffer
The TC74VHC125/126 are high speed CMOS QUAD BUS
BUFFERs fabricated with silicon gate C2MOS technology.
They achieve the high speed operation similar to equivalent
Bipolar Shottky TTL while maintaining the CMOS low power
dissipation.
The TC74VHC125 requires the 3-state control input G to be
set high to place the output into the high impedance state,
whereas the TC74VHC126 requires the control input G to be set
low to place the output into high impedance.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up.
This circuit prevents device destruction due to mismatched
supply and input voltages.
Features
High speed: tpd = 3.8 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (min)
Power down protection is provided on all inputs.
Balanced propagation delays: tpLH ∼− tpHL
Wide operating voltage range: VCC (opr) = 2 to 5.5 V
Low noise: VOLP = 0.8 V (max)
Pin and function compatible with 74ALS125/126
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74VHC125F, TC74VHC126F
TC74VHC125FN, TC74VHC126FN
TC74VHC125FT, TC74VHC126FT
TC74VHC125FK, TC74VHC126FK
Weight
SOP14-P-300-1.27A
SOL14-P-150-1.27
TSSOP14-P-0044-0.65A
VSSOP14-P-0030-0.50
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
: 0.02 g (typ.)
1 2007-10-01

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