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PDF NCP81161 Data sheet ( Hoja de datos )

Número de pieza NCP81161
Descripción VR12.5 Compatible Synchronous Buck MOSFET Drivers
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No Preview Available ! NCP81161 Hoja de datos, Descripción, Manual

NCP81161
VR12.5 Compatible
Synchronous Buck MOSFET
Drivers
The NCP81161 is a high performance dual MOSFET gate driver
optimized to drive the gates of both highside and lowside power
MOSFETs in a synchronous buck converter. It can drive up to 3 nF
load with a 25 ns propagation delay and 20 ns transition time.
Adaptive anticrossconduction and power saving operation
circuit can provide a low switching loss and high efficiency solution
for notebook and desktop systems. Bidirectional EN pin can provide
a fault signal to controller when the gate driver fault detect under
OVP, UVLO occur. Also, an undervoltage lockout function
guarantees the outputs are low when supply voltage is low.
Features
Faster Rise and Fall Times
Adaptive AntiCrossConduction Circuit
Integrated Bootstrap Diode
Pre OV function
ZCD Detect
Floating Top Driver Accommodates Boost Voltages of up to 35 V
Output Disable Control Turns Off Both MOSFETs
Undervoltage Lockout
Power Saving Operation Under Light Load Conditions
Direct Interface to NCP6151 and Other Compatible PWM
Controllers
Thermally Enhanced Package
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Power Solutions for Desktop Systems
http://onsemi.com
1
DFN8
MN SUFFIX
CASE 506AA
MARKING DIAGRAM
1
A4MG
G
A4 = Specific Device Code
M = Date Code
G = PbFree Device
ORDERING INFORMATION
Device
Package
Shipping
NCP81161MNTBG DFN8 3000 / Tape & Reel
(PbFree)
NCP81161MNTWG DFN8 3000 / Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
August, 2013 Rev. 2
1
Publication Order Number:
NCP81161/D

1 page




NCP81161 pdf
NCP81161
Table 4. ELECTRICAL CHARACTERISTICS (Unless otherwise stated: 10°C < TA < +125°C; 4.5 V < VCC < 13.2 V,
4.5 V < BSTSWN < 13.2 V, 4.5 V < BST < 30 V, 0 V < SWN < 21 V)
Parameter
Test Conditions
Min.
Typ.
Max.
HIGH SIDE DRIVER (VCC = 5 V)
DRVH Pull Down Resistance
DRVH to SW, BSTSW = 0 V
45
LOW SIDE DRIVER (VCC = 12 V)
Output Impedance, Sourcing Current
2.0 3.0
Output Impedance, Sinking Current
0.7 1.5
DRVL Rise Time trDRVL
DRVL Fall Time tfDRVL
DRVL TurnOff Propagation Delay
tpdlDRVL
CLOAD = 3 nF
CLOAD = 3 nF
CLOAD = 3 nF
16 35
11 20
35
DRVL TurnOn Propagation Delay
tpdhDRVL
CLOAD = 3 nF
8.0 30
DRVL Pull Down Resistance
DRVL to PGND, VCC = PGND
45
LOW SIDE DRIVER (VCC = 5 V)
Output Impedance, Sourcing Current
2.5
Output Impedance, Sinking Current
1.0
DRVL Rise Time trDRVL
DRVL Fall Time tfDRVL
DRVL TurnOff Propagation Delay
tpdlDRVL
CLOAD = 3 nF
CLOAD = 3 nF
CLOAD = 3 nF
30
22
27
DRVL TurnOn Propagation Delay
tpdhDRVL
CLOAD = 3 nF
12
DRVL Pull Down Resistance
DRVL to PGND, VCC = PGND
45
EN INPUT
Input Voltage High
2.0
Input Voltage Low
1.0
Hysteresis
500
Normal Mode Bias Current
1 1
Enable Pin Sink Current
4 30
Propagation Delay Time
20 40
SW Node
SW Node Leakage Current
20
Zero Cross Detection Threshold Voltage
SW to 20 mV, ramp slowly until BG goes off
(Start in DCM mode) (Note 3)
6
Units
kW
W
W
ns
ns
ns
ns
kW
W
W
ns
ns
ns
ns
kW
V
V
mV
mA
mA
ns
mA
mV
Table 5. DECODER TRUTH TABLE
PWM INPUT
PWM High
PWM Mid
PWM Mid
PWM Low
3. Guaranteed by design; not production tested.
ZCD
ZCD Reset
Positive current through the inductor
Zero current through the inductor
ZCD Reset
DRVL
Low
High
Low
High
DRVH
High
Low
Low
Low
http://onsemi.com
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