|
|
PDF XA2001 Data sheet ( Hoja de datos )
| Número de pieza | XA2001 | |
| Descripción | Low Speed USB Micro-controller | |
| Fabricantes | Sino Wealth | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de XA2001 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
XA2001
Low Speed USB Micro-controller
Features
CMOS technology for low power consumption
Operating voltage: 4.4V to 5.25V
3.3V regulator output
- Maximum driving current 35mA
8-bit CMOS Micro-Processor (uP) core
- Instruction set is compatible with standard 8051
Program Memory
- 16K Bytes Program Memory (MASK ROM)
Data Memory
- 256 Bytes Internal RAM
Two 8-Bit auto-reloadable Base Timer
Interrupt
- 11 vectors interrupt structure
- 2 programmable priority levels
Built-in 1.5K ohm USB pull-up resistor
USB Specification Compliance
- Complies with USB specification 1.1
- Support one Low-Speed USB Device Address with3
endpoints (endpoint 0, 1, and 2)
One set of Time Capture circuit (rising and falling edge)
Two Blue LED ports
On-chip oscillator
- Built-in 6MHz RC oscillator for MCU and USB
- Built-in 32KHz RC oscillator for programmable Wake-up
Timer
General Purpose I/O
- Up to 36 selectable GPIO
- External interrupt input: P46
- Source current selectable: Port0, Port1, Port2, Port3
Reset
- Hardware Reset (External Reset, Power-on reset and
Low-Voltage Reset)
- USB Reset
- Watch-dog Reset
- Resume Reset
Two power-reducing mode
- IDLE mode
- Power-down mode
General Description
The XA2001 is designed for high performance Low-speed USB devices. It contains an 8051 micro-controller, Low-Speed USB
SIE, Transceiver and data FIFO, build-in 3.3V regulator, on-chip 16K bytes Mask ROM and internal 256 bytes data RAM, Time
Capture circuit, Base Timer, programmable Watch-dog Timer and Wake-up Timer, support multiple type LED driving capability
for different application, built-in internal 32KHz oscillator, POR and LVR circuit saving your external components cost. Instead of
external crystal, the XA2001 built in an on-chip high accuracy 6MHz RC Resonator for system and USB SIE. Up to 36 selectable
GPIO are provided, while the source current of Port0, Port1, Port2, and Port3 can be configured smaller to support carbon
membrane. Application can cover such items as Keyboards and others.
1 V1.0
1 page  
XA2001
Functional Description
1. Memory
1.1. Memory Allocation
There are 16K bytes Program Memory and 256 bytes Data Memory. These features are described as followed:
1.2. Program Memory
The XA2001 embeds 16K Bytes (0000H - 3FFFH) on-chip program memory for program code.
1.3. Data Memory
The XA2001 provides additional Bytes of RAM space for increased data parameter handling, high level language usage. The
XA2001 has internal data memory that is mapped into three separate segments.
The three segments are:
1. The Lower 128 bytes of RAM (addresses 00H to 7FH) are directly and indirectly addressable.
2. The Upper 128 bytes of RAM (addresses 80H to FFH) are indirectly addressable only.
3. The Special Function Registers (SFR, addresses 80H to FFH) are directly addressable only.
The Upper 128 bytes of RAM occupy the same address space as SFR, but they are physically separate from SFR space. When
an instruction accesses an internal location above address 7Fh, the CPU can distinguish whether to access the upper 128 bytes
data RAM or to access SFR by different addressing mode of the instruction. Note the unused address is unavailable in SFR.
The Internal RAM configuration is shown as below:
0x3FFF
Program Memory
(MASK ROM)
0xFF
Data Memory
(Internal SRAM)
Upper 128 Bytes
(Indirect Addressing Only)
Special Function Register
Area (Direct Addressing
Only)
0x0000
16K Byte Mask ROM
For User
Code Segment
0x80
0x7F
Direct and Indirect
Addressing Area
0x20
0x1F
0x00
General Purpose Registers
Figure 1-1. XA2001 Program/Data Memory Map
Low 128 Byte
Direct and Indirect
Addressing Areas
5
5 Page 
XA2001
3.2.7. Enhanced function of CPU core
Instruction extension of ‘MUL’ and ‘DIV’
Dual Data Pointer
CPU core enhanced registers: AUXC (00F1H), DPL1 (0084H), DPH1 (0085H), INSCON (0086H)
(1) Instruction extension
The 8051 core of XA2001 extends ‘MUL’ and ‘DIV’ instructions to support a 16-bit operand. A new register AUXC is applied to
hold the upper part of the operand/result. AUXC can act as a normal register in other operands except ‘MUL’ or ‘DIV’.
After reset the core is in standard mode that means the ‘MUL’ and ‘DIV’ instructions are operating like the standard 8051
instructions. To enable the 16-bit mode, the corresponding enable bit in the INSCON register has to be set.
MUL
DIV
Operand
INSCON.2 = 0; 8-bit mode
INSCON.2 = 1; 16-bit mode
INSCON.3 = 0; 8-bit mode
INSCON.3 = 1; 16-bit mode
(A)*(B)
(AUXC A)*(B)
(A) / (B)
(AUXC A) / (B)
A
Low Byte
Low Byte
Quotient Low Byte
Quotient Low Byte
Result
B
High Byte
Middle Byte
Remainder
Remainder
AUXC
---
High Byte
---
Quotient High Byte
(2) Dual Data Pointer
Data memory moves can be accelerated using two data pointer. The standard data pointer is called DPTR and the new data
pointer is called DPTR1.
DPTR1 consist of into two SFR registers, DPL1 and DPH1, which can be individually accessed.
User can switch the data pointers by toggling the LSB of INSCON register. ‘INC’ instruction is fastest way to perform this. All
DPTR-related instructions will use the currently selected data pointer.
0086H
Bit [7:4]
Bit3
Bit2
Bit1
Bit0
INSCON
-
INSCON3
INSCON2
-
INSCON0
Initial Value
0000b
0b
00b
0b
0000b
CPU Enhanced Mode Control Register
- Reserved
Instruction ‘DIV’ operand mode configuration bit
R/W
1: 16-bit DIV
0: 8-bit DIV
Reset source: Hardware reset or USB reset
Instruction ‘MUL’ operand mode configuration bit
R/W
1: 16-bit MUL
0: 8-bit MUL
Reset source: Hardware reset or USB reset
- Reserved
R/W
Data pointer selection bit
1: DPTR1
0: DPTR
Reset source: Hardware reset or USB reset
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet XA2001.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| XA2001 | Low Speed USB Micro-controller | Sino Wealth |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |