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PDF UPA650TT Data sheet ( Hoja de datos )
| Número de pieza | UPA650TT | |
| Descripción | P-CHANNEL MOS FIELD EFFECT TRANSISTOR | |
| Fabricantes | Renesas | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µPA650TT
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
The µPA650TT is a switching device, which can be driven directly by a
1.8 V power source.
This device features a low on-state resistance and excellent switching
characteristics, and is suitable for applications such as power switch of
portable machine and so on.
FEATURES
• 1.8 V drive available
• Low on-state resistance
RDS(on)1 = 50 mΩ MAX. (VGS = −4.5 V, ID = −2.5 A)
RDS(on)2 = 68 mΩ MAX. (VGS = −2.5 V, ID = −2.5 A)
RDS(on)3 = 114 mΩ MAX. (VGS = −1.8 V, ID = −1.5 A)
PACKAGE DRAWING (Unit: mm)
2.0±0.2
6 54
1 23
0~0.05
0.65 0.65
S
MAX. 0.8
ORDERING INFORMATION
PART NUMBER
PACKAGE
µPA650TT
6pinWSOF (1620)
Marking: WD
0.05 S
1,2,5,6 : Drain
3 : Gate
4 : Source
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
−12
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC) (TA = 25°C)
Drain Current (pulse) Note1
VGSS
ID(DC)
ID(pulse)
m8.0
m5.0
m20
Total Power Dissipation (TA = 25°C)
Total Power Dissipation (TA = 25°C) Note2
PT1
PT2
0.2
1.4
Channel Temperature
Tch 150
Storage Temperature
Tstg −55 to +150
V
V
A
A
W
W
°C
°C
0.2
+0.1
−0.05
0.1 M S
EQUIVALENT CIRCUIT
Drain
Gate
Body
Diode
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on FR-4 board, t ≤ 5 sec.
Gate
Protection
Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage
may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G16202EJ1V0DS00 (1st edition)
Date Published May 2002 NS CP(K)
Printed in Japan
©
2002
1 page  
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
140
VGS = −1.8 V
120 Pulsed
100
80
60
40
20
0
−0.01
TA = 125°C
75°C
25°C
−25°C
−0.1 − 1
−10
ID - Drain Current - A
−100
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
140
Pulsed
120 ID = −2.5 A
100 VGS = −1.8 V, ID = −1.5 A
80 −2.5 V
60
40 −4.5 V
20
0
-50
0 50 100
Tch - Channel Temperature - °C
150
10000
1000
SWITCHING CHARACTERISTICS
td(off)
VDD = −6.0 V
VGS = −4.0 V
RG = 10 Ω
100
10
tf
td(on)
tr
1
−0.01
− 0.1
−1
ID - Drain Current - A
−10
µPA650TT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
100
Pulsed
80
60
40
ID = −2.5 A
20
0
0 − 2 −4 − 6 −8 − 10
VGS - Gate to Source Voltage - V
10000
CAPACITANCE vs.
DRAIN TO SOURCE VOLTAGE
VGS = 0 V
f = 1 MHz
1000
100
Crss
Ciss
Coss
10
− 0.1
− 1 −10 −100
VDS - Drain to Source Voltage - V
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
−5
ID = −5.0 A
−4
− 3 VDD = −10 V
−6.0 V
−2.0 V
−2
−1
0
02468
QG - Gate Charge - nC
Data Sheet G16202EJ1V0DS
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet UPA650TT.PDF ] | |
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