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PDF UMFT231XA Data sheet ( Hoja de datos )
| Número de pieza | UMFT231XA | |
| Descripción | USB to Full-Handshake UART Development Module | |
| Fabricantes | FTDI | |
| Logotipo |  |
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UMFT231XA Datasheet
Version 1.0
Document Reference No.: FT_000512 Clearance No.: FTDI# 270
Future Technology
Devices International
Ltd
Datasheet
UMFT231XA USB to Full-
Handshake UART
Development Module
UMFT231XA is a USB to serial Full-Handshake UART DIP module with a 0.3” row pitch.
1 Introduction
1.1 Features
The UMFT231XA is a development module
for FTDI‟s FT231XQ, one of the devices from
FTDI‟s range of USB interface bridging
integrated circuit devices. FT231X is a USB
to UART interface with a battery charger
detection feature, which can allow batteries
to be charged with a higher current from a
dedicated charger port (without the FT231X
being enumerated). In addition,
asynchronous and synchronous bit bang
interface modes are available. The internally
generated clock (6MHz, 12MHz and 24MHz)
can be brought out of the on one of the
CBUS pin to be used to drive a
microprocessor or external logic.
The UMFT231XA is a module which is
designed to plug into a standard 0.3” wide
20 pin DIP socket. All components used,
including the FT231XQ are Pb-free (RoHS
compliant).
The UMFT231XA is fitted with a FT231XQ, all
the features of the FT231X can be utilized with
the UMFT231XA. For a full list of the FT231X‟s
features please see the FT231X datasheet
which can be found at the FTDI website.
In addition to the features listed in the FT231X
datasheet, the UMFT231XA has the following
features:
Small PCB assembly module designed to fit
a standard 7.62mm (0.3”) wide 20 pin DIP
socket. Pins are on a 2.54mm (0.1”) pitch.
On board USB „mini-B‟ socket allows
module to be connected to a PC via a
standard A to mini-B USB cable.
20 pin DIP socket (0.3” wide and 0.1” pitch)
included with the evaluation module
package.
Functionally configurable using solder links.
The default solder links setup enables the
module to function without peripheral wires
or application board. Other configurations
enable external power supply options and
variation of logic reference levels.
Use of FTDI devices in life support and/or safety applications is entirely at the user‟s risk, and the user agrees
to defend, indemnify and hold harmless FTDI from any and all damages, claims, suits or expense resulting
from such use.
1 page  
UMFT231XA Datasheet
Version 1.0
Document Reference No.: FT_000512 Clearance No.: FTDI# 270
4.2 Signal Descriptions
Pin No. Name
Type
Description
J1-1,
J2-5
GND
PWR
Module Ground Supply Pins
J1-2
3V3OUT
Power
Input/
Output
3.3V output from integrated L.D.O. regulator. This pin is decoupled with a 100nF
capacitor to ground on the PCB module. The prime purpose of this pin is to provide
the 3.3V supply that can be used internally. For power supply configuration details
see section 5.
J1-3
VCCIO
Power
Input
+1.8V to +3.3V supply to the UART Interface and CBUS I/O pins. For power supply
configuration details see section 5.
J1-4
DCD#
Input Data Carrier Detect Control Input.
J1-5
DSR#
Input Data Set Ready Control Input / Handshake Signal.
J1-6
DTR#
Output Data Terminal Ready Control Output / Handshake Signal.
J1-7
CTS#
Input Clear To Send Control Input / Handshake Signal.
J1-8
RTS#
Output Request to Send Control Output / Handshake Signal.
J1-9
RXD
Input Receiving Asynchronous Data Input.
J1-10 TXD
Output Transmit Asynchronous Data Output.
J2-1
SLD
GND
USB Cable Shield. Connected to GND via a 0ohm resistor.
J2-2
VBUS
Power
Output
5V Power output from the USB bus. For a low power USB bus powered design, up to
100mA can be sourced from the 5V supply and applied to the USB bus. A maximum
of 500mA can be sourced from the USB bus in a high power USB bus powered design.
Currents up to 1A can be sourced from a dedicated charger and applied to the USB
bus.
J2-3
VCC
Power
Input
5V power input for FT231X. For power supply configuration details see section 5.
J2-4
RI#
Input
Ring Indicator Control Input. When remote wake up is enabled in the internal MTP
ROM taking RI# low >20ms can be used to resume the PC USB host controller from
suspend.
J2-6
RESET# Input
FT231X active low reset line. Configured with an on board pull-up and recommended
filter capacitor. When no power is applied to the USB bus reset, will be held low, this
prevents current from flowing to the host or hub when in self-powered mode.
J2-7
CBUS3
I/O
Configurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. Factory Default pin Function is SLEEP#. See CBUS Signal Options, Table
4.2.
J2-8
CBUS2
I/O
Configurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. Factory Default pin function is TXLED. See CBUS Signal Options,Table 4.2.
J2-9
CBUS1
I/O
Configurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. Factory Default pin Function is RXLED#. See CBUS Signal Options, Table
4.2.
J2-10 CBUS0
I/O
Configurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. Factory Default pin Function is TXDED. See CBUS Signal Options,Table 4.2.
Table 4.1 Module Pin Out Description
4.3
5
Copyright © 2012 Future Technology Devices International Limited
5 Page 
UMFT231XA Datasheet
Version 1.0
Document Reference No.: FT_000512 Clearance No.: FTDI# 270
5.6 Variable IO Voltage Supply
Vcc = 1.8V – 3.3V
MCU
TXD
RXD
RTS#
CTS#
TXD
RXD
RTS#
CTS#
GND
VCCIO
3V3OUT
VCC
VBUS
GND
Viewing pins thourgh the board
Solder Link JP1 - Open
from the top. Solder Link JP2 - Closed
Figure 5.4 - USB Bus Powered 3.3V Logic Drive
The FT231X can process signals at CMOS/TTL logic levels in the range of 1.8V to 3.3V. This section
describes how to utilise this feature.
Figure 5.4 shows a configuration where the FT231X is interfaced to a device with IOs operating in the
range of 1.8V - 3.3V. The IO ports of this module need to be powered with a voltage level that is equal to
the level of the signals it is processing. Since the FT231X‟s embedded voltage regulator only outputs 3V3
the IO ports will need to be powered from another power source when operating at voltage levels other
than 3.3V. (Note that Figure 5.4 is for illustration only and that the pins do not actually go all the way
through the PCB)
By default, a short is present between 3V3OUT (embedded voltage regulator) and VCCIO (IO port‟s
power input) by solder links JP1. If an external power supply is used to power the IO ports this solder
links needs to be open. This can be done by removing the solder linking the two pads of the solder links.
The configuration described in this section can be implemented in either bus-powered mode or self-
powered mode.
Note 1: The CBUS and DBUS pins are 5V tolerant; however these signals cannot drive signals at 5V
TTL/CMOS. VCCIO is not 5V tolerant; applying 5V to VCCIO will damage the chip.
Note 2: If power is applied to VCCIO and no power is applied to VCC all IOs will be at an unknown state,
this however will not damage the chip. The FT231X also has protective circuitry to prevent the chip being
damaged by a voltage discrepancy between VCCIO and the level of the signal being processed.
Note 3: When using VCCIO less than 3V3 on a chip from FTDI‟s X-chip range, it is recommended to uses
pull up resistors (47K) to VCCIO on the data lines, all of the UMFT2xxXA devices include an on-board
pull-up for these lines.
11
Copyright © 2012 Future Technology Devices International Limited
11 Page | ||
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