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PDF AT24C04C Data sheet ( Hoja de datos )

Número de pieza AT24C04C
Descripción EEPROM
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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AT24C04C and AT24C08C
I2C-Compatible, (2-wire) Serial EEPROM
4-Kbit (512 x 8), 8-Kbit (1024 x 8)
DATASHEET
Standard Features
Low-voltage and Standard-voltage Operation
̶ VCC = 1.7V to 5.5V
Internally Organized as 512 x 8 (4K), or 1024 x 8 (8K)
I2C-compatible (2-wire) Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1MHz (2.5V, 2.7V, 5V), 400kHz (1.7V) Compatibility
Write Protect Pin for Hardware Data Protection
16-byte Page Write Mode
̶ Partial Page Writes Allowed
Self-timed Write Cycle (5ms Max)
High-reliability
̶ Endurance: 1,000,000 Write Cycles
̶ Data Retention: 100 Years
Green Package Options (Pb/Halide-free/RoHS Compliant)
̶ 8-lead PDIP, 8-lead SOIC, 8-lead TSSOP, 8-pad UDFN, 5-lead SOT23,
and 8-ball VFBGA
Die Options: Wafer Form and Tape and Reel
Description
The Atmel® AT24C04C and AT24C08C provides 4,096/8,192 bits of Serial
Electrically Erasable and Programmable Read-Only Memory (EEPROM)
organized as 512/1024 words of 8 bits each. The device is optimized for use in
many industrial and commercial applications where low-power and low-voltage
operation are essential. AT24C04C/08C is available in space-saving 8-lead PDIP,
8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, 5-lead SOT23, and 8-ball
VFBGA packages and is accessed via a 2-wire serial interface.
Atmel-8787E-SEEPROM-AT24C04C-08C-Datasheet_012015

1 page




AT24C04C pdf
5. Memory Organization
AT24C04C, 4K Serial EEPROM: Internally organized with 32 pages of 16 bytes each, the 4K requires a 9-bit
data word address for random word addressing.
AT24C08C, 8K Serial EEPROM: Internally organized with 64 pages of 16 bytes each, the 8K requires a 10-bit
data word address for random word addressing.
Table 5-1.
Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0MHz, VCC = +1.7V to +5.5V.
Symbol Test Condition
Max Units
CI/O Input/Output capacitance (SDA)
CIN Input capacitance (A0, A1, A2, SCL)
8 pF
6 pF
Note: 1. This parameter is characterized and is not 100% tested.
Conditions
VI/O = 0V
VIN = 0V
Table 5-2. DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.7V to +5.5V (unless otherwise noted).
Symbol Parameter
Test Condition
Min Typ Max Units
VCC1
VCC2
ICC
ICC
ISB1
ISB2
ILI
ILO
VIL
VIH
VOL2
VOL1
Supply Voltage
Supply Voltage
Supply Current VCC = 5.0V
Supply Current VCC = 5.0V
Standby Current VCC = 1.7V
Standby Current VCC = 5.5V
Input Leakage Current
Output Leakage Current
Input Low Level(1)
Input High Level(1)
Output Low Level VCC = 3.0V
Output Low Level VCC = 1.7V
Read at 100kHz
Write at 100kHz
VIN = VCC or VSS
VIN = VCC or VSS
VIN = VCC or VSS
VOUT = VCC or VSS
IOL = 2.1mA
IOL = 0.15mA
1.7
4.5
-0.6
VCC x 0.7
0.4
2.0
0.10
0.05
5.5
5.5
1.0
3.0
1.0
6.0
3.0
3.0
VCC x 0.3
VCC + 0.5
0.4
0.2
V
V
mA
mA
μA
μA
μA
μA
V
V
V
V
Note: 1. VIL min and VIH max are reference only and are not tested.
AT24C04C/08C [DATASHEET]
Atmel-8787E-SEEPROM-AT24C04C-08C-Datasheet_012015
5

5 Page





AT24C04C arduino
8. Write Operations
Byte Write: A write operation requires an 8-bit data word address following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in
the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the
addressing device, such as a microcontroller, must terminate the write sequence with a Stop condition. At this
time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled
during this write cycle and the EEPROM will not respond until the write is complete.
Figure 8-1. Byte Write
S
T
A
R Device
T Address
SDA LINE
M
S
B
W
R
I
T
E Word Address
RA
/C
WK
A
C
K
Data
S
T
O
P
A
C
K
Page Write: The 4K and 8K EEPROM devices are capable of a 16-byte Page Write.
A Page Write is initiated in the same way as a Byte Write, but the microcontroller does not send a Stop condition
after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word,
the microcontroller can transmit up to fifteen more data words. The EEPROM will respond with a zero after each
data word received. The microcontroller must terminate the Page Write sequence with a Stop condition.
The data word address lower four bits are internally incremented following the receipt of each data word. The
higher data word address bits are not incremented, retaining the memory page row location. When the word
address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the
same page. If more than 16 data words are transmitted to the EEPROM, the data word address will “roll over”
and previous data will be overwritten.
Figure 8-2. Page Write
SDA LINE
S
T
A
R Device
T Address
M
S
B
W
R
I
T
E
RA
/C
WK
Word
Address (n)
A
C
K
Data (n)
Data (n + 1)
AA
CC
KK
Data (n + x)
S
T
O
P
A
C
K
Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled,
Acknowledge Polling can be initiated. This involves sending a Start condition followed by the device address
word. The Read/Write bit is representative of the operation desired. Only if the internal write cycle has
completed will the EEPROM respond with a zero allowing the read or write sequence to continue.
AT24C04C/08C [DATASHEET]
Atmel-8787E-SEEPROM-AT24C04C-08C-Datasheet_012015
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