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PDF M25PX16 Data sheet ( Hoja de datos )
| Número de pieza | M25PX16 | |
| Descripción | NOR Serial Flash Embedded Memory | |
| Fabricantes | Micron | |
| Logotipo |  |
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M25PX16 Serial Flash Embedded Memory
Features
M25PX16 NOR Serial Flash Embedded
Memory
16Mb, Dual I/O, 4KB Subsector Erase, 3V Serial Flash Memory
with 75 MHz SPI Bus Interface
Features
• SPI bus compatible serial interface
• 75 MHz (maximum) clock frequency
• 2.3V to 3.6V single supply voltage
• Dual input/output commands resulting in an
equivalent clock frequency of 150 MHz
– DUAL OUTPUT FAST READ command
– DUAL INPUT FAST PROGRAM command
• 16Mb Flash memory
– Uniform 4KB subsectors
– Uniform 64KB sectors
• Additional 64-byte user-lockable, one-time pro-
grammable (OTP) area
• Erase capability
– Subsector (4KB granularity)
– Sector (64KB granularity)
– Bulk erase (16Mb) in 15 s typical
• Write protections
– Software write protection: applicable to every
64KB sector (volatile lock bit)
– Hardware write protection: non-volatile bits BP0,
BP1, BP2 define protected area size
• Deep power down: 5µA typical
• Electronic signature
– JEDEC standard 2-byte signature (7115h)
– Unique ID code (UID) with 16-byte read-only
space, available upon request
• More than 100,000 write cycles per sector
• More than 20 years data retention
• Packages (RoHS compliant)
– VFQFPN8 (MP) 6mm x 5mm
– SO8W (MW) 208 mils
– SO8N (MN) 150 mils
– TBGA24 (ZM) 6mm x 8mm
• Automotive certified parts available
PDF: 09005aef845665a5
m25px16.pdf - Rev. B 3/13 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
1 page  
M25PX16 Serial Flash Embedded Memory
Functional Description
Functional Description
The M25PX16 is a 16Mb (2Mb x 8) serial Flash memory, with advanced write protection
mechanisms, accessed by a high speed SPI-compatible bus. The device supports two
high-performance dual input/output instructions that double the transfer bandwidth
for read and program operations:
• DUAL OUTPUT FAST READ (DOFR) instruction reads data at up to 75MHz by using
both pin DQ1 and pin DQ0 as outputs.
• DUAL INPUT FAST PROGRAM (DIFP) instruction programs data at up to 75MHz by
using both pin DQ1 and pin DQ0 as inputs.
Note: 75MHz operation is available only in VCC range 2.7V–3.6V.
The memory can be programmed 1 to 256 bytes at a time, using the PAGE PROGRAM
instruction. It is organized as 32 sectors that are further divided into 16 subsectors each
(512 total subsectors).
The memory can be erased a 4KB subsector at a time, a 64KB sector at a time, or as a
whole. It can be write protected by software using a mix of volatile and non-volatile pro-
tection features, depending on the application needs. The protection granularity is of
64KB (sector granularity).
The M25PX16 has 64 one-time-programmable bytes (OTP bytes) that can be read and
programmed using two dedicated instructions, READ OTP and PROGRAM OTP, respec-
tively. These 64 bytes can be locked permanently by a particular PROGRAM OTP se-
quence. Once they have been locked, they become read-only and this state cannot be
reverted.
Further features are available as additional security options. More information on these
security features is available, upon completion of an NDA (nondisclosure agreement),
and are, therefore, not described in this datasheet. For more details of this option con-
tact your nearest Micron sales office.
Figure 1: Logic Diagram
VCC
DQ0
C
S#
W#/VPP
HOLD#
DQ1
PDF: 09005aef845665a5
m25px16.pdf - Rev. B 3/13 EN
VSS
5 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.
5 Page 
M25PX16 Serial Flash Embedded Memory
Operating Features
Operating Features
Page Programming
To program one data byte, two commands are required: WRITE ENABLE, which is one
byte, and a PAGE PROGRAM sequence, which is four bytes plus data. This is followed by
the internal PROGRAM cycle of duration tPP. To spread this overhead, the PAGE PRO-
GRAM command allows up to 256 bytes to be programmed at a time (changing bits
from 1 to 0), provided they lie in consecutive addresses on the same page of memory. To
optimize timings, it is recommended to use the PAGE PROGRAM command to program
all consecutive targeted bytes in a single sequence than to use several PAGE PROGRAM
sequences with each containing only a few bytes.
Dual Input Fast Program
The DUAL INPUT FAST PROGRAM command makes it possible to program up to 256
bytes using two input pins at the same time (by changing bits from 1 to 0). For opti-
mized timings, it is recommended to use the DUAL INPUT FAST PROGRAM command
to program all consecutive targeted bytes in a single sequence than to use several DUAL
INPUT FAST PROGRAM sequences each containing only a few bytes.
Subsector Erase, Sector Erase, Bulk Erase
The PAGE PROGRAM command allows bits to be reset from 1 to 0. Before this can be
applied, the bytes of memory need to have been erased to all 1s (FFh). This can be ach-
ieved a subsector at a time using the SUBSECTOR ERASE command, a sector at a time
using the SECTOR ERASE command, or throughout the entire memory using the BULK
ERASE command. This starts an internal ERASE cycle of duration tSSE, tSE or tBE. The
ERASE command must be preceded by a WRITE ENABLE command.
Polling during a Write, Program, or Erase Cycle
An improvement in the time to complete the following commands can be achieved by
not waiting for the worst case delay (tW, tPP, tSSE, tSE, or tBE).
• WRITE STATUS REGISTER
• PROGRAM OTP
• PROGRAM
• DUAL INPUT FAST PROGRAM
• ERASE (SUBSECTOR ERASE, SECTOR ERASE, BULK ERASE)
The write in progress (WIP) bit is provided in the status register so that the application
program can monitor this bit in the status register, polling it to establish when the pre-
vious WRITE cycle, PROGRAM cycle, or ERASE cycle is complete.
Active Power, Standby Power, and Deep Power-Down
When chip select (S#) is LOW, the device is selected, and in the ACTIVE POWER mode.
When S# is HIGH, the device is deselected, but could remain in the ACTIVE POWER
mode until all internal cycles have completed (PROGRAM, ERASE, WRITE STATUS
REGISTER). The device then goes in to the STANDBY POWER mode. The device con-
sumption drops to ICC1.
PDF: 09005aef845665a5
m25px16.pdf - Rev. B 3/13 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet M25PX16.PDF ] | |
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