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PDF ADAM27C16 Data sheet ( Hoja de datos )
| Número de pieza | ADAM27C16 | |
| Descripción | 4-BIT SINGLE-CHIP MICROCONTROLLERS | |
| Fabricantes | ABOV | |
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July 10, 2012 Ver 0.3
4-BIT SINGLE CHIP MICROCOMPUTERS
ADAM27CXX
USER`S MANUAL
• ADAM27C08
• ADAM27C16
1 page  
ADAM27CXX
1. Overview
1.5. Pin Function
PIN
NAME
INPUT
OUTPUT
FUNCTION
@RESET
@STOP
K0 ~ K3
R0 ~ R2
-. 4-bit I/O port. (Input mode is set only when each of
them output `H`)
-. Each pin has STOP mode release function
Key-Strobe
in input mode.
(at T-key Scan)
-. Output mode is set when each of them output `L`.
Input
or
I/O
-. When used as `output`, each pin can be set and
(with Pull-up) Keep status
reset independently.
before STOP
-. When set as the input mode, input state of pin is
(at M-key Scan)
read. At output mode, if port is read, data register
is read instead of the state of pin.
P0 ~ P3
-. 4-bit I/O port. (Input mode is set only when each of
them output `H`)
Key-Strobe
-. Each pin has STOP mode release function
(at T-key Scan)
in input mode.
or
-. Output mode is set when each of them output `L`.
I/O
Input
Forcibly Low
-. When used as `output`, each pin can be set and
(with Pull-up) or Keep status
reset independently.
before STOP
-. When set as the input mode, input state of pin is
by Mask Option
read. At output mode, if port is read, data register
(at M-key Scan)
is read instead of the state of pin.
-. 2-bit I/O port. (Input mode is set only when each of
them output `H` and pull-up is enabled.)
-. Pull-ups can be enabled by user program.
-. Output mode is set when each of them output `L`,
or when it’s pull-up is disabled.
CS0~CS1
I/O
-. When used as `output`, each pin can be set and
Keep status
Hi-Z
before STOP
reset independently.
-. When set as the input mode, input state of pin is
read. At output mode, if port is read, data register
is read instead of the state of pin.
ROUT
-. High Current Pulse Output.
Output
-. N-ch open drain output.
Hi-Z Hi-Z
VDD
GND
Power -. Positive power supply.
Power -. Ground
--
--
Page 4 of 36
5 Page 
ADAM27CXX
2. Architecture
2.2. Address Register
The following registers are used to address the ROM.
• Page address register (PA) :
Holds ROM's page number (0~Fh) to be addressed.
• Page buffer register (PB) :
Value of PB is loaded by an LPBI command when newly addressing a page.
Then it is shifted into the PA when rightly executing a branch instruction (BR)
and a subroutine call (CAL).
• Program counter (PC) :
Available for addressing word on each page.
• Stack register (SR) :
Stores returned-word address in the subroutine call mode.
2.2.1. Page address register and page buffer register :
Address one of pages #0 to #15 in the ROM by the 4-bit binary counter.
Unlike the program counter, the page address register is usually unchanged so
that the program will repeat on the same page unless a page changing command
is issued. To change the page address, take two steps such as
(1) writing in the page buffer what page to jump (execution of LPBI) and
(2) execution of BR or CAL, because instruction code is of eight bits so that page
and word can not be specified at the same time.
In case a return instruction (RTN) is executed within the subroutine that has been
called in the other page, the page address will be changed at the same time.
2.2.2. Program counter :
This 6-bit binary counter increments for each fetch to address a word in the
currently addressed page having an instruction to be next executed.
For easier programming, at turning on the power, the program counter is
reset to the zero location. The PA is also set to `0`. Then the program
counter specifies the next address in random sequence.
When BR, CAL or RTN instructions are decoded, the switches on each step
are turned off not to update the address. Then, for BR or CAL, address
data are taken in from the instruction operands (a0 to a5), or for RTN, and
address is fetched from stack register No. 1.
2.2.3. Stack register :
This stack register provides three stages each for the program counter (6bits)
and the page address register (4bits) so that subroutine nesting can be made
on three levels.
Page 10 of 36
11 Page | ||
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