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PDF 74HC374A Data sheet ( Hoja de datos )
| Número de pieza | 74HC374A | |
| Descripción | Octal 3-State Non-Inverting D Flip-Flop | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 74HC374A (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State
Non-Inverting D Flip-Flop
High–Performance Silicon–Gate CMOS
The MC54/74HC374A is identical in pinout to the LS374. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
Data meeting the setup time is clocked to the outputs with the rising edge
of the clock. The Output Enable input does not affect the states of the
flip–flops, but when Output Enable is high, the outputs are forced to the
high–impedance state; thus, data may be stored even when the outputs are
not enabled.
The HC374A is identical in function to the HC574A which has the input
pins on the opposite side of the package from the output. This device is
similar in function to the HC534A which has inverting outputs.
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 266 FETs or 66.5 Equivalent Gates
LOGIC DIAGRAM
DATA
INPUTS
D0 3
D1 4
D2 7
D3 8
D4 13
D5 14
D6 17
D7 18
CLOCK 11
2 Q0
5 Q1
6 Q2
9 Q3
12 Q4
15 Q5
16 Q6
19 Q7
NONINVERTING
OUTPUTS
OUTPUT ENABLE 1
PIN 20 = VCC
PIN 10 = GND
FUNCTION TABLE
Output
Enable
L
L
L
H
Inputs
Clock
L,H,
X
Output
DQ
HH
LL
X No Change
XZ
X = don’t care
Z = high impedance
8/96
© Motorola, Inc. 1996
3–1
MC54/74HC374A
20
1
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
20
1
20
1
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
20
1
SD SUFFIX
SSOP PACKAGE
CASE 940C–03
20
1
DT SUFFIX
TSSOP PACKAGE
CASE 948E–02
ORDERING INFORMATION
MC54HCXXXAJ
Ceramic
MC74HCXXXAN
Plastic
MC74HCXXXADW SOIC
MC74HCXXXASD SSOP
MC74HCXXXADT
TSSOP
PIN ASSIGNMENT
OUTPUT
ENABLE
Q0
1
2
20 VCC
19 Q7
D0 3
18 D7
D1 4
17 D6
Q1 5
16 Q6
Q2 6
15 Q5
D2 7
14 D5
D3 8
13 D4
Q3 9
GND 10
12 Q4
11 CLOCK
REV 7
1 page  
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
MC54/74HC374A
TEST CIRCUITS
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
1 kΩ
CL*
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
* Includes all probe and jig capacitance
Figure 4.
* Includes all probe and jig capacitance
Figure 5.
EXPANDED LOGIC DIAGRAM
D0
3
D
Q
D1
4
D
Q
D2
7
D
Q
D3
8
D
Q
D4
13
D
Q
D5
14
D
Q
D6
17
D
Q
D7
18
D
Q
11
Clock
Output 1
Enable
CCCCCCCC
2 5 6 9 12 15 16 19
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
High–Speed CMOS Logic Data
DL129 — Rev 6
3–5
MOTOROLA
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74HC374A.PDF ] | |
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