PDF A24C02 Data sheet ( Hoja de datos )

Número de pieza	A24C02
Descripción	2K BITS (256 x 8) TWO-WIRE SERIAL EEPROM
Fabricantes	AiT Semiconductor
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No Preview Available ! AiT Semiconductor Inc. www.ait-ic.com A24C02 EEPROM 2K BITS (256 X 8) TWO‐WIRE SERIAL DESCRIPTION A24C02 provides 2048 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 256 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. The A24C02 is accessed via a two-wire serial interface. The A24C02 is available in TSOT-25, SOP8, DFN8 and TSSOP8 Packages. ORDERING INFORMATION FEATURES  Two-wire Serial Interface  VCC = 1.8V to 5.5V  Bi-directional Data Transfer Protocol  Internally Organized A24C02, 256X8(2Kbits)  1 MHz (5V), 400 kHz (1.8V, 2.5V, 2.7V) Compatibility  8-byte Page (2K) Write Modes  Self-timed Write Cycle (5 ms max)  1 Million Write Cycles guaranteed  Data Retention > 100 Years  Operating Temperature: -40℃ to +85℃  Available in TSOT-25, SOP8, DFN8 and TSSOP8 Package Package Type Part Number TSOT-25 A24C02TE5R TE5 A24C02TE5VR A24C02M8R Tape & Reel Tape & Reel Tape & Reel SOP8 A24C02M8U M8 A24C02M8VR A24C02M8VU Tube Tape & Reel Tube TSSOP8 TMX8 A24C02TMX8R A24C02TMX8U A24C02TMX8VR Tape & Reel Tube Tape & Reel A24C02TMX8VU Tube DFN8 A24C02J8R J8 A24C02J8VR Tape & Reel Tape & Reel Note R: Tape & Reel , T: Tube, V: Green Package AiT provides all Pb free products, suffix “ V “ means Green Package Pb Free Green Pb Free Pb Free Green Green Pb Free Pb Free Green Green Pb Free Green REV1.3 - SEP 2008 RELEASED, NOV 2011 UPDATED - -1- 1 page AiT Semiconductor Inc. www.ait-ic.com A24C02 EEPROM 2K BITS (256 X 8) TWO‐WIRE SERIAL Applicable over recommended operating range from TA=-40℃ to +85℃, VCC=+1.8V to +5.5V, CL=1 TTL Gate and 100 pF (unless otherwise noted) Parameter Symbol 1.8-volt Min Typ. Max 5.0-volt Min Typ. Max Units AC Electrical Characteristics Clock Frequency, SCL fSCL - - 400 - - 1000 kHz Clock Pulse Width Low tLOW 1.2 - - 0.6 - - μs Clock Pulse Width High tHIGH 0.6 - - 0.4 - - μs Noise Suppression Time tI - - 50 - - 40 μs Clock Low to Data Out Valid tAA 0.05 - 0.9 0.05 - 0.55 μs Time the bus must be free before a new transmission tBUF 1.2 - - 0.5 - - μs can start Start Hold Time Start Setup Time Data In Hold Time tHD.STA 0.6 - tSU.STA 0.6 - tHD.DAT 0 - - 0.25 - - 0.25 - -0- μs - μs - μs Data In Setup Time tSU.DAT 100 - - 100 - - ns Inputs Rise Time tR - - 0.3 - - 0.3 μs Inputs Fall Time tF - - 300 - - 100 ns Stop Setup Time tSU.STO 0.6 - - 0.25 - - μs Data Out Hold Time tDH 50 - - 50 - - ns Write Cycle Time tWR - - 5 - - 5 ms Write 5.0V, 25℃, Byte Mode Endurance 1M - - - - - Cycles REV1.3 - SEP 2008 RELEASED, NOV 2011 UPDATED - -5- 5 Page AiT Semiconductor Inc. www.ait-ic.com A24C02 EEPROM 2K BITS (256 X 8) TWO‐WIRE SERIAL CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address "roll over" during read is from the last byte of the last memory page to the first byte of the first page. The address "roll over" during write is from the last byte of the current page to the first byte of the same page. Once the device address with the read/write select bit set to "1" is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input "0" but does generate a following stop condition (see Figure 7 on page 13). 6. Read Operations RANDOM READ: A random read requires a "dummy" byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a "0" but does generate a following stop condition (see Figure 8 on page 13). SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will "roll over" and the sequential read will continue. The sequential read operation is terminated when the microcontroller does not respond with a "0" but does generate a following stop condition (see Figure 9 on page 14). REV1.3 - SEP 2008 RELEASED, NOV 2011 UPDATED - - 11 - 11 Page

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