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PDF ADT7517-KGD Data sheet ( Hoja de datos )
| Número de pieza | ADT7517-KGD | |
| Descripción | SPI-/I2C-Compatible Temperature Sensor | |
| Fabricantes | Analog Devices | |
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Known Good Die
SPI-/I2C-Compatible Temperature Sensor
with 4-Channel ADC and Quad Voltage Output
ADT7517-KGD
FEATURES
GENERAL DESCRIPTION
Four 10-bit DACs
Buffered voltage output
Guaranteed monotonic by design over all codes
10-bit temperature-to-digital converter
10-bit, 4-channel ADC
DC input bandwidth
Input range: 0 V to 2.28 V
Temperature range: −40°C to +120°C
Temperature sensor accuracy: ±3°C typical
Supply range: 2.7 V to 5.5 V
DAC output range: 0 V to VDD
The ADT7517-KGD combines a 10-bit temperature-to-digital
converter, a 10-bit, 4-channel ADC, and a quad 10-bit DAC in die
form. The ADT7517-KGD also includes a band gap temperature
sensor and a 10-bit ADC to monitor and digitize the temperature
reading to a resolution of 0.25°C.
The ADT7517-KGD operates from a single 2.7 V to 5.5 V supply.
The input voltage range on the ADC channels is 0 V to 2.28 V, and
the input bandwidth is dc. The reference for the ADC channels is
derived internally. The output voltage of the DAC ranges from
0 V to VDD, with an output voltage settling time of 7 μs typical.
Power-down current: <10 μA
The ADT7517-KGD provides two serial interface options: a 4-wire
Internal 2.28 VREF option
Double-buffered input logic
serial interface that is compatible with SPI, QSPI™, MICROWIRE®,
and DSP interface standards, and a 2-wire SMBus/I2C interface.
Buffered reference input
The ADT7517-KGD features a standby mode that is controlled
Power-on reset to 0 V DAC output
through the serial interface.
Simultaneous update of outputs (LDAC function)
On-chip, rail-to-rail output buffer amplifier
Compatible with SPI, I2C, QSPI, MICROWIRE, and DSP
Support for SMBus packet error checking (PEC)
Known good die (KGD): a die that is tested and guaranteed
over the full specifications of the data sheet
APPLICATIONS
Process control
Smart battery chargers
The reference for the four DACs is derived either internally or
from a reference pad. The outputs of all DACs can be updated
simultaneously using the software LDAC function or the external
LDAC pad. The ADT7517-KGD incorporates a power-on reset
circuit, ensuring that the DAC output powers up to 0 V and
remains at 0 V until a valid write takes place.
Additional application and technical information can be found
in the ADT7517 data sheet.
Portable equipment
FUNCTIONAL BLOCK DIAGRAM
D+/AIN1
D–/AIN2
LDAC/AIN3
AIN4
ON-CHIP
TEMPERATURE
SENSOR
INTERNAL
TEMPERATURE
VALUE REGISTER
EXTERNAL
TEMPERATURE
VALUE REGISTER
ANALOG
MUX
VDD
SENSOR
ADC
VDD
VALUE REGISTER
AIN1
VALUE REGISTER
AIN2
VALUE REGISTER
AIN3
VALUE REGISTER
AIN4
VALUE REGISTER
LIMIT
COMPARATOR
STATUS
REGISTERS
ADDRESS POINTER
REGISTER
THIGH LIMIT
REGISTERS
TLOW LIMIT
REGISTERS
VDD LIMIT
REGISTERS
AINHIGH LIMIT
REGISTERS
AINLOW LIMIT
REGISTERS
CONTROL CONFIG. 1
REGISTER
CONTROL CONFIG. 2
REGISTER
CONTROL CONFIG. 3
REGISTER
DAC CONFIGURATION
REGISTERS
LDAC CONFIGURATION
REGISTERS
INTERRUPT MASK
REGISTERS
SPI/SMBus INTERFACE
ADT7517-KGD
DAC A
STRING
REGISTERS DAC A
DAC B
STRING
REGISTERS DAC B
DAC C
STRING
REGISTERS DAC C
DAC D
STRING
REGISTERS DAC D
GAIN
SELECT
LOGIC
POWER-
DOWN
LOGIC
VOUT-A
VOUT-B
VOUT-C
VOUT-D
INT/INT
INTERNAL
REFERENCE
VDD
GND
CS SCL/SCLK SDA/DIN DOUT/ADD
Figure 1.
LDAC/AIN3 VREF-IN
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2013–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Known Good Die
ADT7517-KGD
Parameter
Min Typ Max
DIGITAL OUTPUT
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Current, IOH
Output Capacitance, COUT
INT/INT Output Saturation Voltage
2.4
0.4
1
50
0.8
I2C TIMING CHARACTERISTICS6, 7
Serial Clock Period, t1
Data In Setup Time to SCL High, t2
Data Out Stable After SCL Low, t3
SDA Low Setup Time to SCL Low
(Start Condition), t4
SDA High Hold Time After SCL High
(Stop Condition), t5
SDA and SCL Fall Time, t6
SDA and SCL Rise Time, t7
2.5
50
0
50
50
300
3008
SPI TIMING CHARACTERISTICS3, 9
CS to SCLK Setup Time, t1
0
SCLK High Pulse Width, t2
SCLK Low Pulse Width, t3
Data Access Time After SCLK
Falling Edge, t410
Data Setup Time Prior to SCLK
Rising Edge, t5
Data Hold Time After SCLK
Rising Edge, t6
CS to SCLK Hold Time, t7
50
50
20
0
0
35
CS to DOUT High Impedance, t8
40
POWER REQUIREMENTS
VDD
VDD Settling Time
IDD (Normal Mode)11
2.7 5.5
50
3
2.2 3
IDD (Power-Down Mode)
10
10
Power Dissipation
10
33
Unit
V
V
mA
pF
V
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
V
ms
mA
mA
µA
µA
mW
µW
Test Conditions/Comments
ISOURCE = ISINK = 200 µA
IOL = 3 mA
VOH = 5 V
IOUT = 4 mA
See Figure 2
Fast mode I2C
See Figure 3
VDD settles to within 10% of its final voltage level
VDD = 3.3 V, VIH = VDD, and VIL = GND
VDD = 5 V, VIH = VDD, and VIL = GND
VDD = 3.3 V, VIH = VDD, and VIL = GND
VDD = 5 V, VIH = VDD, and VIL = GND
VDD = 3.3 V, normal mode
VDD = 3.3 V, shutdown mode
1 DC specifications are tested with the outputs unloaded.
2 Linearity is tested using a reduced code range: Code 28 to Code 1023.
3 Guaranteed by design and characterization; not production tested.
4 Round robin is the continuous sequential measurement of the following channels: VDD, internal temperature, external temperature (AIN1, AIN2), AIN3, and AIN4.
5 For the amplifier output to reach its minimum voltage, the offset error must be negative. For the amplifier output to reach its maximum voltage (VREF = VDD), the offset
error plus gain error must be positive.
6 The SDA and SCL timing is measured with the input filters turned on to meet the fast mode I2C specification. Switching off the input filters improves the transfer rate
but has a negative effect on the EMC behavior of the part.
7 Guaranteed by design; not production tested. All I2C timing specifications are for fast mode operation, but the interface is still capable of handling the slower standard
rate specifications.
8 The interface is also capable of handling the I2C standard mode rise time specification of 1000 ns.
9 All input signals are specified with tR = tF = 5 ns (10% to 90% of VDD) and timed from a voltage level of 1.6 V.
10 Measured with the load circuit shown in Figure 4.
11 The IDD specification is valid for all DAC codes and full-scale analog input voltages. Interface inactive. All DACs and ADCs active. Load currents excluded.
Rev. A | Page 5 of 11
5 Page 
Known Good Die
OUTLINE DIMENSIONS
1.825
0.356
19 18 17
1
2
3
4
5
6
7
8
16 15
14
13
12
11
2.530
9 10
TOP VIEW
(CIRCUIT SIDE)
SIDE VIEW
0.076 × 0.076
Figure 7. 19-Pad Bare Die [CHIP]
(C-19-1)
Dimensions shown in millimeters
DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS
Table 6. Die Specifications
Parameter
Chip Size
Scribe Line Width
Die Size
Thickness
Bond Pad
Bond Pad Composition
Backside
Passivation
Value
1707 × 2362
118 × 168
1825 × 2530
356
76
99.5% Al, 0.5% Cu
Not applicable
Nitride
Unit
μm
μm
μm
μm
μm (minimum)
%
Not applicable
Not applicable
Table 7. Assembly Recommendations
Assembly Component
Recommendation
Die Attach
No special requirements
Bonding Method
Gold ball or aluminum wedge
Bonding Sequence
Pad 3, Pad 4, and Pad 5 first
ORDERING GUIDE
Model
ADT7517-KGD-DF
Temperature Range
−40°C to +120°C
Package Description
19-Pad Bare Die [CHIP]
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
ADT7517-KGD
Package Option
C-19-1
©2013–2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10686-0-10/14(A)
Rev. A | Page 11 of 11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ADT7517-KGD.PDF ] | |
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