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LDTA114TM3T5G fiches techniques PDF

LRC - Bias Resistor Transistors

Numéro de référence LDTA114TM3T5G
Description Bias Resistor Transistors
Fabricant LRC 
Logo LRC 





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LDTA114TM3T5G fiche technique
LESHAN RADIO COMPANY, LTD.
Bias Resistor Transistors
PNP Silicon Surface Mount Transistors
With Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by integrating
them into a single device. The use of a BRT can reduce both system
cost and board space. The device is housed in the SOT-723 package
which is designed for low power surface mount applications.
ƽSimplifies Circuit Design
ƽReduces Board Space
ƽReduces Component Count
ƽThe SOT-723 Package can be Soldered using Wave or Reflow.
ƽAvailable in 4 mm, 8000 Unit Tape & Reel
ƽThese are Pb-Free Devices.
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Collector-Base Voltage
VCBO
Collector-Emitter Voltage
VCEO
Collector Current
IC
THERMAL CHARACTERISTICS
50
50
100
Characteristic
Symbol
Max
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD 260 (Note 1)
600 (Note 2)
2.0 (Note 1)
4.8 (Note 2)
Thermal Resistance –
Junction-to-Ambient
RθJA
480 (Note 1)
205 (Note 2)
Junction and Storage
Temperature Range
TJ, Tstg –55 to +150
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
Unit
Vdc
Vdc
mAdc
Unit
mW
mW/°C
°C/W
°C
LDTA114EM3T5G
Series
3
1
SOT-723
2
PIN 1
BASE
(INPUT)
R1
R2
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
MARKING DIAGRAM
3
XX M
12
xx = Specific Device Code
M = Date Code
Version 1.0
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