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PDF EM78P469 Data sheet ( Hoja de datos )
| Número de pieza | EM78P469 | |
| Descripción | 8-Bit Microcontroller | |
| Fabricantes | ELAN Microelectronics | |
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EM78P469
8-Bit
Microcontroller
Product
Specification
DOC. VERSION 1.3
ELAN MICROELECTRONICS CORP.
January 2009
1 page  
Contents
APPENDIX
A Comparison Table ................................................................................................... 60
B Package Information............................................................................................... 61
B.1 Package Size for EM78P469AQ64J and EM78P469BQ64J............................ 61
B.2 Package Size for EM78P469AL64J and EM78P469BL64J ............................. 61
B.3 Package Size for EM78P469Q44J................................................................... 62
B.4 Package Size for EM78P469L44J.................................................................... 62
Product Specification (V1.3) 02.03.2009
•v
5 Page 
EM78P469
8-Bit Microcontroller
8 Functional Description
8.1 Operational Registers
8.1.1 Bank 0 R0 (Indirect Addressing Register)
R0 is not a physically implemented register. It is used as indirect addressing pointer.
Any instruction using R0 as register actually accesses data pointed by the RAM Select
Register (R4).
8.1.2 Bank 0 R1 (TCC)
Incremented by an external signal edge applied to TCC, or by the instruction cycle
clock. Written and read by the program as any other register.
8.1.3 Bank 0 R2 (Program Counter)
The configuration structure generates 8K×13 on-chip ROM addresses to the relative
programming instruction codes. The structure is depicted in Figure 3.
"JMP" instruction allows the direct loading of the low 10 program counter bits.
"CALL" instruction loads the low 10 bits of the PC and PC+1, then push onto the stack.
"RET'' ("RETL k", "RETI") instruction loads the program counter with the contents at the
top of stack.
"MOV R2, A" allows the loading of an address from the A register to the PC, and
contents of the ninth and tenth bits do not change.
"ADD R2, A" allows a relative address to be added to the current PC, and contents of
the ninth and tenth bits do not change.
The most significant bits (A10~A12) will be loaded with the content of Bits PS0~PS2 in
the status register (R3) upon execution of a "JMP'', "CALL'' instruction.
R3
PC
A12 A11 A10
A9 A8 A7
~
000 PAGE0 0000~03FF
001 PAGE1 0400~07FF
CALL
A0
RET
RETL
RETI
Stack 1
Stack 2
Stack 3
Stack 4
Stack 5
Stack 6
Stack 7
Stack 8
111 PAGE7 1C00~1FFF
Product Specification (V1.3) 02.03.2009
(This specification is subject to change without further notice)
•5
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EM78P469.PDF ] | |
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