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PDF IBIS4-A-6600 Data sheet ( Hoja de datos )
| Número de pieza | IBIS4-A-6600 | |
| Descripción | 6.6 MP CMOS Image Sensor | |
| Fabricantes | Cypress Semiconductor | |
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ADVANCE
INFORMATION
IBIS4-A-6600
CYII4SM6600AB
6.6 MP CMOS Image Sensor
Features
Table 1. Key Performance Parameters
Parameter
Active Pixels
Pixel Size
Optical format
Active Imager Size
Shutter Type
Maximum Data
Rate/Master Clock
Frame rate
ADC resolution
Sensitivity (@ 650 nm)
Dynamic Range
Full Well Charge
Temporal Noise
Dark current
High Dynamic Range
Modes
Supply Voltage
Power consumption
Typical Value
2210 (H) x 3002 (V)
3.5 µm x 3.5 µm
1 inch
7.74 mm x 10.51 mm
Electronic Rolling Shutter
40 MPS/40 MHz
5 fps (2210 x 3002)
89 fps (640 x 480)
ADC resolution
411 V.m2/W.s, 4.83 V/lux.s
59 dB
Full Well Charge
24 e-
3.37 mV/s
Double Slope, Non Destructive
Read out (NDR).
Analog: 2.5V-3.3V, Digital: 2.5V,
I/O: 2.5V
190 mWatt
Table 1. Key Performance Parameters (continued)
Parameter
Operating temperature
Color Filter Array
Packaging
Typical Value
–30 °C to +65 °C
Mono, RGB Bayer Pattern
68-pins LCC
Description
The IBIS4-6600 is a solid -state CMOS image sensor that
integrates the functionality of complete analog image
acquisition, digitizer and digital signal processing system on a
single chip. The image sensor compromises a 6.6 MPixel
resolution with 2210x3002 active pixels. The image size is fully
programmable to user-defined windows of interest. The pixels
are on a 3.5-µm pitch. The sensor is available in a
Monochrome version or Bayer (RGB) patterned color filter
array.
User-programmable row and column start/stop positions allow
windowing down to 2x1 pixel window for digital zoom. Sub
sampling reduces resolution while maintaining the constant
field of view. The analog video output of the pixel array is
processed by an on-chip analog signal pipeline. Double
Sampling (DS) eliminates the fixed pattern noise. The
programmable gain and offset amplifier maps the signal swing
to the ADC input range. A 10-bit ADC converts the analog data
to a 10-bit digital word stream. The sensor uses a 3-wire
Serial-Parallel (SPI) interface. It operates with a single 2.5V
power supply and requires only one master clock for operation
up to 40 MHz. It is housed in a 68-pin ceramic LCC package.
This data sheet allows the user to develop a camera system
based on the described timing and interfacing.
Applications
• Machine vision
• Biometry
• Document scanning
Cypress Semiconductor Corporation
Document Number: 001-02366 Rev. *D
• 198 Champion Court •
San Jose, CA 95134-1709 • 408-943-2600
Revised January 2, 2007
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ADVANCE
INFORMATION
IBIS4-A-6600
CYII4SM6600AB
Specifications
General Specifications
Table 2. General Specifications.
Parameter
Pixel architecture
Pixel size
Resolution
Pixel rate
Shutter type
Full frame rate
Specification
3T-pixel
3.5 m x 3.5 m
2210 x3002
40 MHz
Electronic rolling shutter
5 frames/second
Electro-optical specifications
Overview
Table 3. Electro-optical Specifications
Parameter
FPN (local)
PRNU (local)
Conversion gain
Output signal amplitude
Saturation charge
Sensitivity (peak)
Sensitivity (visible)
Peak QE * FF
Peak Spectral Resp.
Specification
<0.20%
<1.5%
Conversion gain
0.6V
21.500 e-
411V.m2/W.s
4.83 V/lux.s
328 V.m2/W.s
2.01 V/lux.s
25%
0.13 A/W
Fill factor
Dark current
Dark Signal Non Uniformity
Temporal noise
S/N Ratio
Spectral sensitivity range
Optical cross talk
Power dissipation
35%
3.37 mV/s
78 e-/s
8.28 mV/s
191 e-/s
24 RMS e-
895:1 (59 dB)
400 - 1000 nm
15%
4%
190 mWatt
Remarks
The resolution and pixel size results in a 7.74 mm x 10.51 mm
optical active area.
Using a 40- MHz system clock and 1 or 2 parallel outputs.
Increases with ROI read out and/or sub sampling.
Remarks
RMS% of saturation signal.
RMS of signal level.
@ output (measured).
At nominal conditions.
@ 650 nm
(85 lux = 1 W/m2).
400-700 nm
(163 lux = 1 W/m2).
Average QE*FF = 22% (visible range).
Average SR*FF = 0.1 A/W (visible range).
See spectral response curve.
Light sensitive part of pixel (measured).
Typical value of average dark current of the whole pixel array
(@ 21 °C).
Dark current RMS value (@ 21 °C).
Measured at digital output (in the dark).
Measured at digital output (in the dark).
To the first neighboring pixel.
To the second neighboring pixel.
Typical (including ADCs).
Document Number: 001-02366 Rev. *D
Page 5 of 40
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ADVANCE
INFORMATION
IBIS4-A-6600
CYII4SM6600AB
Dark and Dummy Pixels
Black pixels are implemented as "optical" black pixels.
Floor Plan Pixel Array on page 11 shows a plan of the pixel
array. The sensor has been designed in "portrait" orientation.
A ring of dummy pixels surrounds the active pixels.
Figure 7. Floor Plan Pixel Array
Dummy ring of pixels ,
s urrounding complete pixel
array. not read
R ing of dummy pixels ,
covered with black layer,
re a da ble
R ing of 2 dummy pixels ,
illuminated, readable
array of active pixels , read
3002x 2210
2222
2210
Pixel Rate
The pixel rate for this sensor is high enough to support a frame
rate of >75 Hz for a window size of 640 x 480 pixels (VGA
format) + 23 pixels over scan in both directions. Taking into
account a row blanking time of 7.2 s (as baseline, see also
2.10.2.1.g.), this requires a minimum pixel rate of nearly 40
MHz. The final bandwidth of the column amplifiers, output
stage etc. is determined by external bias resistors. Taken into
account a pixel rate of 40 MHz a full frame rate of a little more
than 5 frames/s will be obtained.
The frame period of the IBIS4-6600 sensor can be calculated
as follows:
=> Frame period = (Nr. Lines * (RBT + pixel period * Nr.
Pixels))
With:
Nr. Lines: Number of Lines read out each frame (Y).
Nr. Pixels: Number of pixels read out each line (X).
RBT: Row Blanking Time = 7.2 us (typical).
Pixel period: 1/40 MHz = 25 ns.
Example: read out time of the full resolution at nominal speed
(40 MHz pixel rate):
=> Frame period = (3002 * (7.2 us + 25 ns * 2210)) = 187.5
ms => 5.33 fps.
Region of Interest (ROI) Read Out
Windowing can easily be achieved by uploading the starting
point of the x- and y-shift registers in the sensor registers (see
2.9.1). This downloaded starting point initiates the shift register
in the x- and y-direction triggered by the Y_START (initiates
the Y-shift register) and the Y_CLK (initiates the X-shift
register) pulse. The minimum step size for the x-address is 24
(only even start addresses can be chosen) and 1 for the
Y-address (every line can be addressed). The frame rate
increases almost linearly when fewer pixels are read out. Table
8. gives an overview of the achievable frame rates with ROI
read out.
Table 8. Frame Rate vs. Resolution
Image Resolution (Y*X)
3002 x 2210
1501 x 1104
640 x 480
Frame rate [frames/s]
5
14
89
Frame readout time [ms]
187.5
67
11
Comment
Full resolution.
ROI read out.
11
Document Number: 001-02366 Rev. *D
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