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PDF R4S2426R Data sheet ( Hoja de datos )
| Número de pieza | R4S2426R | |
| Descripción | 16-Bit Single-Chip Microcomputer | |
| Fabricantes | Renesas | |
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The revision list summarizes the locations of
revisions and additions. Details should always
be checked by referring to the relevant text.
16
H8S/2426, H8S/2426R, H8S/2424 Group
User’s Manual: Hardware
Renesas 16-Bit Single-Chip Microcomputer
H8S Family / H8S/2400 Series
H8S/2426
H8S/2426R
H8S/2424
R4F2426
R4S2426
R4F2426R
R4S2426R
R4F2424
R4S2424
All information contained in these materials, including products and product
specifications, represents information on the product at the time of publication and is
subject to change by Renesas Electronics Corp. without notice. Please review the
latest information published by Renesas Electronics Corp. through various means,
including the Renesas Electronics Corp. website (http://www.renesas.com).
www.renesas.com
Rev.4.00 Sep 2011
1 page  
How to Use This Manual
1. Purpose and Target Readers
This manual is designed to provide the user with an understanding of the hardware functions
and electrical characteristics of the MCU. It is intended for users designing application systems
incorporating the MCU. A basic knowledge of electric circuits, logical circuits, and MCUs is
necessary in order to use this manual.
The manual comprises an overview of the product; descriptions of the CPU, system control
functions, peripheral functions, and electrical characteristics; and usage notes.
Particular attention should be paid to the precautionary notes when using the manual. These
notes occur within the body of the text, at the end of each section, and in the Usage Notes
section.
The revision history summarizes the locations of revisions and additions. It does not list all
revisions. Refer to the text of the manual for details.
The following documents apply to the H8S/2426, H8S/2426R, H8S/2424 Group. Make sure to
refer to the latest versions of these documents. The newest versions of the documents listed
may be obtained from the Renesas Electronics Web site.
Document Type
Contents
Document Title
Document No.
Data Sheet
Hardware overview and
electrical characteristics
⎯
⎯
User’s manual for
Hardware
Hardware specifications (pin
assignments, memory maps,
peripheral function
specifications, electrical
characteristics, timing charts)
and operation description
H8S/2426, H8S/2426R, This User’s
H8S/2424 Group User’s manual
manual for Hardware
User’s manual for Note: Refer to the application
Software
notes for details on using
peripheral functions.
H8S/2600 Series
H8S/2000 Series
Software Manual
REJ09B0139
Application Note Description of CPU instruction Available from Renesas Electronics
set Web site.
Renesas Technical Information on using peripheral
Update
functions and application
examples
Page v of xxx
5 Page 
Section 5 Interrupt Controller ............................................................................107
5.1 Features.............................................................................................................................. 107
5.2 Input/Output Pins............................................................................................................... 109
5.3 Register Descriptions ......................................................................................................... 110
5.3.1 Interrupt Control Register (INTCR) ..................................................................... 111
5.3.2 Interrupt Priority Registers A to N (IPRA to IPRN)............................................. 112
5.3.3 IRQ Enable Register (IER) ................................................................................... 114
5.3.4 IRQ Sense Control Registers H and L (ISCRH, ISCRL)...................................... 116
5.3.5 IRQ Status Register (ISR)..................................................................................... 122
5.3.6 IRQ Pin Select Register (ITSR)............................................................................ 123
5.3.7 Software Standby Release IRQ Enable Register (SSIER) .................................... 126
5.4 Interrupt Sources................................................................................................................ 127
5.4.1 External Interrupts ................................................................................................ 127
5.4.2 Internal Interrupts ................................................................................................. 128
5.5 Interrupt Exception Handling Vector Table....................................................................... 129
5.6 Interrupt Control Modes and Interrupt Operation .............................................................. 136
5.6.1 Interrupt Control Mode 0...................................................................................... 137
5.6.2 Interrupt Control Mode 2...................................................................................... 139
5.6.3 Interrupt Exception Handling Sequence ............................................................... 141
5.6.4 Interrupt Response Times ..................................................................................... 143
5.6.5 DTC and DMAC Activation by Interrupt ............................................................. 144
5.7 Usage Notes ....................................................................................................................... 145
5.7.1 Conflict between Interrupt Generation and Disabling .......................................... 145
5.7.2 Instructions that Disable Interrupts....................................................................... 146
5.7.3 Times when Interrupts are Disabled ..................................................................... 146
5.7.4 Interrupts during Execution of EEPMOV Instruction .......................................... 146
5.7.5 Change of IRQ Pin Select Register (ITSR) Setting .............................................. 146
5.7.6 IRQ Status Register (ISR)..................................................................................... 147
Section 6 Bus Controller (BSC).........................................................................149
6.1 Features.............................................................................................................................. 149
6.2 Input/Output Pins............................................................................................................... 152
6.3 Register Descriptions ......................................................................................................... 155
6.3.1 Bus Width Control Register (ABWCR)................................................................ 156
6.3.2 Access State Control Register (ASTCR) .............................................................. 156
6.3.3 Wait Control Registers AH, AL, BH, and BL
(WTCRAH, WTCRAL, WTCRBH, and WTCRBL) ........................................... 157
6.3.4 Read Strobe Timing Control Register (RDNCR) ................................................. 163
6.3.5 CS Assertion Period Control Registers H, L (CSACRH, CSACRL).................... 165
Page xi of xxx
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