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Allegro MicroSystems - Linear Hall Effect Sensor ICs

Numéro de référence A1324
Description Linear Hall Effect Sensor ICs
Fabricant Allegro MicroSystems 
Logo Allegro MicroSystems 





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A1324 fiche technique
A1324, A1325, and A1326
Low Noise, Linear Hall Effect Sensor ICs with Analog Output
Features and Benefits
• Temperature-stable quiescent output voltage and sensitivity
• Output voltage proportional to magnetic flux density
• Low-noise output increases accuracy
• Precise recoverability after temperature cycling
• Ratiometric rail-to-rail output
• Wide ambient temperature range: –40°C to 150°C
• Immune to mechanical stress
• Solid-state reliability
• Enhanced EMC performance for stringent automotive
applications
Packages
3-pin ultramini SIP
1.5 mm × 4 mm × 3 mm
(suffix UA)
3-pin SOT23-W
2 mm × 3 mm × 1 mm
(suffix LH)
Approximate footprint
Description
New applications for linear output Hall-effect devices, such
as displacement, angular position, and current measurement,
require high accuracy in conjunction with small package size.
The AllegroA1324, A1325, and A1326 linear Hall-effect
sensor ICs are designed specifically to achieve both goals. This
temperature-stable device is available in a miniature surface
mount package (SOT23W) and an ultra-mini through-hole
single in-line package.
These ratiometric Hall effect sensor ICs provide a voltage
output that is proportional to the applied magnetic field. They
feature a quiescent voltage output of 50% of the supply voltage.
The A1324/25/26 feature factory programmed sensitivities of
5.0 mV/G, 3.125 mV/G, and 2.5 mV/G, respectively.
The features of these linear devices make them ideal for
use in automotive and industrial applications requiring high
accuracy, and operate through an extended temperature range,
–40°C to 150°C.
Each BiCMOS monolithic circuit integrates a Hall element,
temperature-compensating circuitry to reduce the intrinsic
sensitivity drift of the Hall element, a small-signal high-gain
amplifier, a clamped low-impedance output stage, and a
proprietary dynamic offset cancellation technique.
These devices are available in a 3-pin ultra-mini SIP package
(UA), and a 3-pin surface mount SOT-23 style package (LH). Both
are lead (Pb) free, with 100% matte tin leadframe plating.
V+
VCC
Functional Block Diagram
To All Subcircuits
GND
Sensitivity and
Sensitivity TC
Offset
Trim Control
VOUT
A1324-DS, Rev. 4

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