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PDF ADNS-3000 Data sheet ( Hoja de datos )

Número de pieza ADNS-3000
Descripción Low Power Optical Mouse Sensor
Fabricantes PixArt 
Logotipo PixArt Logotipo



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Data Sheet
ADNS-3000
Low Power Optical Mouse Sensor
Description
The PixArt Imaging ADNS-3000 is a low power, small
form factor optical mouse sensor. It has a new low-power
architecture and automatic power management modes,
making it ideal for battery, power-sensitive applications –
such as cordless input devices.
The ADNS-3000 is capable of high-speed motion detec-
tion – up to 30 ips and 20 g. In addition, it has an on-chip
oscillator and requires an external resistor to set the LED
current.
The ADNS-3000 along with the ADNS-5110-001 lens,
or ADNS-5120-002 trim lens and HSDL-4261 IR LED or
HLMP-EG3E-xxxxx Red LED
form a complete and compact mouse tracking system.
There are no moving parts and this translates to
high reliability and less maintenance for the end user.
In addition, precision optical alignment is not required,
facilitating high volume assembly.
The sensor is programmed via registers through a four-
wire serial port. It is housed in an 8-pin staggered dual
in-line package (DIP).
Features
Low Power Architecture
Small Form Factor
Programmable Periods / ResponseTimes and Downshift
Times from one mode to another for the Power-saving
Modes
High Speed Motion Detection up to 30 ips and 20 g
External Interrupt Output for Motion Detection
Internal Oscillator – no clock input needed
Selectable Resolution of up to 2000 cpi
Operating Voltage: as low as 1.7 V
Four-wire Serial Port Interface
Applications
Optical mice and optical trackballs
Integrated input devices
Battery-powered input devices
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
PixArt Imaging Inc.

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ADNS-3000 pdf
PixArt Imaging Inc.
A
ADNS-3000 Low Power Optical Mouse Sensor
33.45
1.317
Pin 1
A
Sensor
Lens
LED
PCB
Section A – A
Important Note: Pin 1 of sensor should be located nearest to the LED
Figure 4. 2D Assembly drawing of ADNS-3000 (Top and Side View)
Sensor
Lens
Surface
Lens Reference Plane
Note:
A – Distance from object surface to lens reference plane
B – Distance from object surface to sensor reference plane
Figure 5. Distance from lens reference plane to tracking surface (Z)
LED Clip
Alignment Post
(Optional)
Base Plate
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
PixArt Imaging Inc.
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ADNS-3000 arduino
PixArt Imaging Inc.
ADNS-3000 Low Power Optical Mouse Sensor
Table 3. AC Electrical Specifications
Electrical characteristics over recommended operating conditions. Typical values at 25° C, VDD = 1.9 V, VDDLED = 1.9 V,
IRLED HSDL-4261, RLED = 36 .
Parameter
Symbol
Min. Typ. Max. Units Notes
Motion Delay after Reset
Forced Rest Enable
tMOT-RST
tREST-EN
50 ms From RESET register write to valid motion
1 s From Rest Mode (RM) bits set to target
rest mode
Wake from Forced Rest
tREST-DIS
1 s From Rest Mode (RM) bits cleared to
valid motion
Power Down
tPD
50 ms From PD active (when bit 1 of register
0 x 0d is set) to low current
Wake from Power Down
tWAKEUP
55 ms Through RESET register 0 x 3a.
From PD inactive to valid motion
MISO Rise Time
MISO Fall Time
MISO Delay after SCLK
tr-MISO
tf-MISO
tDLY-MISO
60
200 ns
CL = 100 pF
40
200 ns
CL = 100 pF
120 ns
From SCLK falling edge to MISO data valid,
no load conditions
MISO Hold Time
MOSI Hold Time
thold-MISO
thold-MOSI
250
200
1/fSCLK ns
ns
Data held until next falling SCLK edge
Amount of time data is valid after SCLK
rising edge
MOSI Setup Time
SPI Time between Write
Commands
tsetup-MOSI
tSWW
120
30
ns From data valid to SCLK rising edge
s From rising SCLK for last bit of the first data
byte, Commands to rising SCLK for last bit
of the second data byte
SPI Time between Write
and Read Commands
tSWR
20
s From rising SCLK f or last bit of the first
data byte, to rising SCLK for last bit of the
second address byte
SPI Time between Read and tSRW
Subsequent Commands
tSRR
250
ns From rising SCLK for last bit of the first data
byte, to falling SCLK for the first bit of the
next address
SPI Read Address-Data
Delay
tSRAD
4
s From rising SCLK for last bit of the address
byte, to falling SCLK for first bit of data
being read
NCS Inactive after Motion
Burst
tBEXIT
250
ns Minimum NCS inactive time after motion
burst before next SPI usage
NCS to SCLK Active
SCLK to NCS Inactive
(For Write Operation)
SCLK to NCS Inactive
(For Read Operation)
NCS to MISO high-Z
Transient Supply Current
tNCS-SCLK
tSCLK-NCS
tSCLK-NCS
tNCS-MISO
IDDT
120
120
20
ns From NCS falling edge to first SCLK falling
edge
ns From last SCLK rising edge to NCS rising
edge, for valid MISO data transfer
s From last SCLK rising edge to NCS rising
edge, for valid MISO data transfer
250 ns
From NCS rising edge to MISO high-Z state
60 mA Max supply current during a VDD ramp
from 0 to VDD with min 150 s and max 20
ms rise time. (Does not include charging
currents for bypass capacitors.)
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
PixArt Imaging Inc.
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