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Número de pieza ADT7483A
Descripción Dual Channel Temperature Sensor and Over Temperature Alarm
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ADT7483A
Dual Channel Temperature
Sensor and Over
Temperature Alarm
The ADT7483A is a three-channel digital thermometer and
under/over temperature alarm, intended for use in PCs and thermal
management systems. It can measure the temperature in two remote
locations, for example, the remote thermal diode in a CPU or GPU, or
a discrete diode connected transistor. It can also measure its own
ambient temperature. The temperature of the remote thermal diode
and ambient temperature can be accurately measured to 1C. The
temperature measurement range defaults to 0C to 127C, compatible
with ADM1032, but can be switched to a wider measurement range,
from 64C to +191C.
The ADT7483A communicates over a 2-wire serial interface
compatible with system management bus (SMBus) standards. The
SMBus address is set by the ADD0 and ADD1 pins. As many as nine
different SMBus addresses are possible.
An ALERT output signals when the on-chip or remote temperature
is outside the programmed limits. The THERM output is a comparator
output that allows, for example, on/off control of a cooling fan. The
ALERT output can be reconfigured as a second THERM output, if
required.
Features
1 Local and 2 Remote Temperature Sensors
0.25C Resolution/1C Accuracy on Remote Channels
1C Resolution/1C Accuracy on Local Channel
Extended, Switchable Temperature Measurement Range
0C to 127C (Default) or –64C to +191C
2-wire SMBus Serial Interface with SMBus Alert Support
Programmable Over/Under Temperature Limits
Offset Registers for System Calibration
Up to 2 Overtemperature Fail-safe THERM Outputs
Small 16-lead QSOP Package
240 mA Operating Current, 5 mA Standby Current
This Device is Pb-Free, Halogen Free and is RoHS Compliant
Applications
Desktop and Notebook Computers
Industrial Controllers
Smart Batteries
Automotive
Embedded Systems
Burn-in Applications
Instrumentation
http://onsemi.com
QSOP16
CASE 492
PIN ASSIGNMENT
ADD1 1
VDD 2
D1+ 3
D14
THERM 5
GND 6
NC 7
NC 8
ADT7483A
(Top View)
16 ADD0
15 SCLK
14 SDATA
13
ALERT/
THERM2
12 D2+
11 D2
10 NC
9 NC
NC = No Connect
MARKING DIAGRAM
ADT7483
AARQZ
#YYWW
ADT7483AARQZ = Specific Device Code
# = Pb-Free Package
YYWW
= Date Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 19 of this data sheet.
Semiconductor Components Industries, LLC, 2012
July, 2012 Rev. 2
1
Publication Order Number:
ADT7483A/D

1 page




ADT7483A pdf
ADT7483A
TYPICAL PERFORMANCE CHARACTERISTICS
3.5
DEV 1 DEV 8
DEV 15
3.0
DEV 2 DEV 9
DEV 16
DEV 3 DEV 10 MEAN
2.5
DEV 4
DEV 5
DEV 11
DEV 12
HIGH 4S
LOW 4S
2.0
DEV 6
DEV 7
DEV 13
DEV 14
1.5
1.0
0.5
0
0.5
1.0
50 0 50 100 150
TEMPERATURE (C)
Figure 3. Local Temperature Error vs. Temperature
3.5
DEV 1 DEV 8
DEV 15
3.0
DEV 2
DEV 3
DEV 9
DEV 10
DEV 16
MEAN
2.5
DEV 4
DEV 5
DEV 11 HIGH 4S
DEV 12 LOW 4S
2.0
DEV 6
DEV 7
DEV 13
DEV 14
1.5
1.0
0.5
0
0.5
1.0
50
0 50 100
TEMPERATURE (C)
Figure 5. Remote 2 Temperature Error
vs. Temperature
150
0
2
4
6
8
10
DEV 3
12 DEV 2
14
DEV 4
16
18
0
5 10 15 20
CAPACITANCE (nF)
25
Figure 7. Temperature Error vs. D+/DCapacitance
3.5
DEV 1 DEV 8
DEV 15
3.0
DEV 2 DEV 9
DEV 16
DEV 3 DEV 10 HIGH 4S
2.5 DEV 4 DEV 11 LOW 4S
DEV 5 DEV 12
2.0 DEV 6 DEV 13
DEV 7 DEV 14
1.5
1.0
0.5
0
0.5
1.0
50 0 50 100
TEMPERATURE (C)
Figure 4. Remote 1 Temperature Error
vs. Temperature
150
10
5
D+ To GND
0
5
10
15 D+ To VDD
20
25
1
10
LEAKAGE RESISTANCE (MW)
100
Figure 6. Temperature Error vs. D+/DLeakage
Resistance
1000
900
800
700
600
500
400
300
200
DEV 2BC
DEV 4BC
DEV 3BC
100
0
0.01
0.1 1
10
CONVERTION RATE (Hz)
Figure 8. Operating Supply Current
vs. Conversion Rate
100
http://onsemi.com
5

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ADT7483A arduino
ADT7483A
Table 12. STATUS REGISTER 1 BIT ASSIGNMENTS
Bit Mnemonic
Function
ALERT
7
BUSY
1 when ADC Converting
6
LHIGH
1 when Local High
(Note 1)
Temperature Limit Tripped
No
Yes
5
LLOW
1 when Local Low
(Note 1)
Temperature Limit Tripped
Yes
4
R1HIGH
1 when Remote 1 High
(Note 1)
Temperature Limit Tripped
Yes
3
R1LOW
1 when Remote 1 Low
(Note 1)
Temperature Limit Tripped
Yes
2 D1 OPEN 1 when Remote 1 Sensor
(Note 1)
Open Circuit
Yes
1 R1THRM1 1 when Remote1 THERM
Limit Tripped
No
0 LTHRM1 1 when Local THERM Limit No
Tripped
1. These flags stay high until the status register is read, or they are
reset by POR.
Table 13. STATUS REGISTER 2 BIT ASSIGNMENTS
Bit Mnemonic
Function
ALERT
7 Res Reserved for Future Use No
6 Res Reserved for Future Use No
5 Res Reserved for Future Use No
4
R2HIGH
1 when Remote 2 High
Yes
(Note 1)
Temperature Limit Tripped
3
R2LOW
1 when Remote 2 Low
Yes
(Note 1)
Temperature Limit Tripped
2 D2 OPEN 1 when Remote 2 Sensor
(Note 1)
Open Circuit
Yes
1 R2THRM1 1 when Remote 2 THERM
Limit Tripped
No
0
ALERT
1 when ALERT Condition
Exists
No
1. These flags stay high until the status register is read, or they are
reset by POR.
The eight flags that can generate an ALERT are NOR’d
together, so if any of them are high, the ALERT interrupt
latch is set and the ALERT output goes low (provided they
are not masked out).
Reading the Status 1 register will clear the five flags, Bit 6
to Bit 2 in Status Register 1, provided the error conditions
that caused the flags to be set have gone away. Reading the
Status 2 register will clear the three flags, Bit 4 to Bit 2 in
Status Register 2, provided the error conditions that caused
the flags to be set have gone away. A flag bit can only be reset
if the corresponding value register contains an in-limit
measurement or if the sensor is good.
The ALERT interrupt latch is not reset by reading the
status register. It is reset when the ALERT output has been
serviced by the master reading the device address, provided
the error condition has gone away and the status register flag
bits have been reset.
When Flag 1 and/or Flag 0 of Status Register 1, or Flag 1
of Status Register 2 are set, the THERM output goes low to
indicate that the temperature measurements are outside the
programmed limits. The THERM output does not need to be
reset, unlike the ALERT output. Once the measurements are
within the limits, the corresponding status register bits are
automatically reset and the THERM output goes high. The
user may add hysteresis by programming Register 0x21.
The THERM output will be reset only when the temperature
falls below the THERM limit minus hysteresis.
When Pin 13 is configured as THERM2, only the high
temperature limits are relevant. If Flag 6, Flag 4 of Status
Register 1, or Flag 4 of Status Register 2 are set, the
THERM2 output goes low to indicate that the temperature
measurements are outside the programmed limits. Flag 5
and Flag 3 of Status Register 1, and Flag 3 of Status
Register 2 have no effect on THERM2. The behavior of
THERM2 is otherwise the same as THERM.
Bit 0 of Status Register 2 is set whenever the ALERT
output of the ADT7483A is asserted low. This means that the
user need only read Status Register 2 to determine if the
ADT7483A is responsible for the ALERT. Bit 0 of Status
Register 2 is reset when the ALERT output is reset. If the
ALERT output is masked, then this bit is not set.
Offset Register
Offset errors may be introduced into the remote
temperature measurement by clock noise or by the thermal
diode being located away from the hot spot. To achieve the
specified accuracy on this channel, these offsets must be
removed.
The offset values are stored as 10-bit, twos complement
values:
The Remote 1 offset MSBs are stored in Register 0x11,
and the LSBs are stored 0x12 (low byte, left justified).
The Remote 2 offset MSBs are stored in Register 0x34,
and the LSBs are stored 0x35 (low byte, left justified).
The Remote 2 offset can be written to, or read from, the
Remote 1 offset registers if Bit 3 of the Configuration 1
register is set to 1. This bit should be set to 0 (default)
to read the Remote 1 offset values.
Only the upper 2 bits of the LSB registers are used. The
MSB of the MSB offset registers is the sign bit. The
minimum offset that can be programmed is 128C, and the
maximum is +127.75C.
The value in the offset register is added or subtracted to the
measured value of the remote temperature.
The offset register powers up with a default value of 0C
and will have no effect unless the user writes a different
value to it.
http://onsemi.com
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