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PDF WM8326 Data sheet ( Hoja de datos )
| Número de pieza | WM8326 | |
| Descripción | Processor Power Management Subsystem | |
| Fabricantes | Wolfson Microelectronics | |
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WM8326
Processor Power Management Subsystem
DESCRIPTION
The WM8326 is an integrated power-management subsystem
which provides a cost-effective, flexible, single-chip solution for
power management. It is specifically targeted at the
requirements of a range of low-power portable consumer
products, but is suitable to any application with a multimedia
processor. The WM8326 is designed to operate as a system
PMIC supporting the ARM9™, ARM11™ and ARM Cortex-A™
processors, but is also capable of supporting the majority of
application and mobile processors at the heart of a wide range
of low-power consumer multimedia applications.
The start-up behaviour and configuration is fully programmable
in an integrated OTP non-volatile memory. This highly flexible
solution helps reduce time-to-market, as changing application
requirements can be very easily accommodated in the OTP.
The InstantConfigTM interface enables an external EEPROM to
configure the WM8326.
The WM8326 power management subsystem comprises four
programmable DC-DC converters and eleven LDO regulators
(four of which are low-noise for supplying sensitive analogue
subsystems). The integrated OTP bootstrap circuitry controls
the start-up sequencing and voltages of the converters and
regulators as well as the sequencing of system clocks.
The DC-DC converters deliver high performance and high
efficiency across a wide range of operating conditions. They
are optimised to support the high load current transients seen
in modern processor core domains. DC-DC3 / DC-DC4 can be
connected together and operated in ‘dual’ mode to support an
increased current load of up to 1.6A
An on-chip regulator provides power for always-on PMIC
functions such as register map and the RTC. The device
provides autonomous backup battery switchover. A low-power
LDO is included to support ‘Alive’ processor power domains
external to the WM8326.
A 12-bit Auxiliary ADC supports a wide range of applications
for internal as well as external analogue sampling, such as
voltage detection and temperature measurement.
WM8326 includes a crystal oscillator and an internal RC
oscillator to generate all clock signals for autonomous system
start-up and processor clocking. A Secure Real-time Clock (S-
RTC) and alarm function is included, capable of waking up the
system from low-power modes. A watchdog function is
provided to ensure system integrity.
To maximise battery life, highly-granular power management
enables each function in the WM8326 subsystem to be
independently powered down through a control interface or
alternatively through register and OTP-configurable GPIOs.
The device offers a standby power consumption of <7uA,
making it particularly suitable for portable applications.
The WM8326 is supplied in an 8x8mm 81-lead QFN package,
ideal for use in portable systems. The WM8326 forms part of
the Wolfson series of audio and power management solutions,
and is widely register compatible with the WM831X devices.
FEATURES
Power Management
2 x DC-DC synchronous buck converters
(0.6V - 1.8V, 2.5A, DVS)
2 x DC-DC synchronous buck converters
(0.85V - 3.4V, 1A)
1 x LDO regulator (0.9V - 3.3V, 300mA, 1)
2 x LDO regulators (0.9V - 3.3V, 200mA, 1)
3 x LDO regulators (0.9V - 3.3V, 100mA, 2)
2 x Low-noise LDO regulators (1.0V - 3.5V, 200mA, 1)
2 x Low-noise LDO regulators (1.0V - 3.5V, 150mA, 2)
1 x ‘Alive’ regulator (0.8V – 1.55V, up to 25mA)
System Control
I2C or SPI compatible primary control interface
Comprehensive interrupt scheme
Watchdog timer and system reset control
Autonomous power sequencing and fault detection
OTP memory bootstrap configuration function
Additional Features
Auxiliary ADC for multi-function analogue measurement
128-bit pseudo-random unique ID
Secure Real-Time Clock with wake-up alarm
12 x configurable multi-function (GPIO) pins
Comprehensive clocking scheme: low-power 32kHz RTC
crystal oscillator, GPIO clock output and 4MHz RC clock
for power management
System LED outputs indicating device power state, and
fault status
Package Options
8 x 8 x 0.85mm, 81-lead QFN package
APPLICATIONS
Cellular Handsets
Smartphones
Electronic Books
Portable Media Players
Mobile Internet Devices
Electronic Gaming Devices
Netbooks
Smartbooks
Set Top Box
Digital Picture Frames
WOLFSON MICROELECTRONICS plc
To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews
Production Data, June 2012, Rev 4.0
Copyright 2012 Wolfson Microelectronics plc
1 page  
Production Data
WM8326
14.1 GENERAL DESCRIPTION ............................................................................... 49
14.2 ICE AND OTP MEMORY DEFINITION ............................................................ 49
14.3 BOOTSTRAP (START-UP) FUNCTION........................................................... 50
14.3.1 START-UP FROM OTP MEMORY ...................................................................................... 50
14.3.2 START-UP FROM ICE MEMORY (DEVELOPMENT MODE).............................................. 51
14.3.3 START-UP FROM DCRW REGISTER SETTINGS ............................................................. 51
14.3.4 EXTERNAL ICE MEMORY CONNECTION ......................................................................... 51
14.4 OTP / ICE MEMORY CONTROL...................................................................... 52
14.4.1 ENTERING / EXITING THE PROGRAM STATE ................................................................. 53
14.4.2 OTP / ICE READ COMMAND .............................................................................................. 53
14.4.3 OTP WRITE COMMAND ..................................................................................................... 54
14.4.4 OTP VERIFY COMMAND .................................................................................................... 54
14.4.5 OTP FINALISE COMMAND ................................................................................................. 55
14.4.6 OTP CONTROL REGISTER ................................................................................................ 55
14.5 OTP / ICE INTERRUPTS ................................................................................. 57
14.6 DCRW MEMORY CONTENTS......................................................................... 57
14.6.1 DCRW PAGE 0 ....................................................................................................................57
14.6.2 DCRW PAGE 1 ....................................................................................................................58
14.6.3 DCRW PAGE 2 ....................................................................................................................58
14.6.4 DCRW PAGE 3 ....................................................................................................................59
14.6.5 DCRW PAGE 4 ....................................................................................................................61
15 POWER MANAGEMENT ............................................................................ 62
15.1 GENERAL DESCRIPTION ............................................................................... 62
15.2 DC-DC CONVERTER AND LDO REGULATOR ENABLE ............................... 62
15.3 TIMESLOT CONTROL AND HARDWARE ENABLE (GPIO) CONTROL......... 63
15.4 OPERATING MODE CONTROL ...................................................................... 64
15.4.1 DC-DC SYNCHRONOUS BUCK CONVERTERS................................................................ 64
15.4.2 LDO REGULATORS ............................................................................................................ 64
15.5 OUTPUT VOLTAGE CONTROL ...................................................................... 64
15.5.1 DC-DC SYNCHRONOUS BUCK CONVERTERS................................................................ 64
15.5.2 LDO REGULATORS 1-10 ....................................................................................................65
15.5.3 LDO REGULATOR 11.......................................................................................................... 65
15.6 DC-DC SYNCHRONOUS BUCK CONVERTER CONTROL............................ 65
15.6.1 DC-DC3 / DC-DC4 DUAL MODE ......................................................................................... 66
15.7 LDO REGULATOR CONTROL ........................................................................ 67
15.8 HARDWARE CONTROL (GPIO)...................................................................... 67
15.9 FAULT PROTECTION...................................................................................... 68
15.10 MONITORING AND FAULT REPORTING ....................................................... 68
15.11 POWER MANAGEMENT REGISTER DEFINITIONS ...................................... 69
15.11.1 DC-DC CONVERTER AND LDO REGULATOR ENABLE ................................................... 69
15.11.2 DC-DC SYNCHRONOUS BUCK CONVERTER CONTROL................................................ 69
15.11.3 LDO REGULATOR CONTROL ............................................................................................ 76
15.11.4 EXTERNAL POWER ENABLE (EPE) CONTROL................................................................ 84
15.11.5 MONITORING AND FAULT REPORTING........................................................................... 85
15.12 POWER MANAGEMENT INTERRUPTS ......................................................... 86
15.13 POWER GOOD INDICATION .......................................................................... 88
15.14 DC-DC SYNCHRONOUS BUCK CONVERTER OPERATION ........................ 90
15.14.1 OVERVIEW .......................................................................................................................... 90
15.14.2 DC-DC SYNCHRONOUS BUCK CONVERTERS................................................................ 90
15.15 LDO REGULATOR OPERATION..................................................................... 94
15.15.1 OVERVIEW .......................................................................................................................... 94
15.15.2 LDO REGULATORS ............................................................................................................ 95
16 RESERVED ................................................................................................. 96
17 POWER SUPPLY CONTROL ..................................................................... 97
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PD, June 2012, Rev 4.0
5
5 Page 
Production Data
PIN NAME
TYPE
DC-DC Converters and LDO Regulators
B7 DC1GND
Supply
A8
DC1FB
Analogue Input
A7
DC1LX
Analogue I/O
B8 DC1VDD
Supply
B6 DC2GND
Supply
A5
DC2FB
Analogue Input
A6
DC2LX
Analogue I/O
B5 DC2VDD
Supply
M1 DC3GND
Supply
J1
DC3FB
Analogue Input
L1
DC3LX
Analogue I/O
K1 DC3VDD
Supply
N1 DC4GND
Supply
T1
DC4FB
Analogue Input
P1
DC4LX
Analogue I/O
R1 DC4VDD
Supply
A3 LDO1_2VDD
Supply
B2
LDO1VOUT
Analogue Output
B3
LDO2VOUT
Analogue Output
B4 LDO3VDD
Supply
A4
LDO3VOUT
Analogue Output
W3 LDO4VDD
Supply
Y2
LDO4VOUT
Analogue Output
Y1 LDO5VDD
Supply
W2
LDO5VOUT
Analogue Output
W1 LDO6VDD
Supply
V1
LDO6VOUT
Analogue Output
R3 LDO7_8VDD
Supply
N2
LDO7VOUT
Analogue Output
R2
LDO8VOUT
Analogue Output
M2 LDO9_10VDD
Supply
M3
LDO9VOUT
Analogue Output
N3
LDO10VOUT
Analogue Output
V3
LDO11VOUT
Analogue Output
Y8
LDO12VOUT
Analogue I/O
W7
LDO13VOUT1
Analogue I/O
K2
LDO13VOUT2
Analogue I/O
Voltage and Current References
W8
VREFC
Analogue I/O
Y9
IREFR
Analogue I/O
System LED Drivers
U3
LED1
Digital Output
U2
LED2
Digital Output
POWER
DOMAIN
DESCRIPTION
WM8326
DC1VDD
DC2VDD
DC3VDD
DC4VDD
LDO1VDD
LDO2VDD
LDO3VDD
LDO4VDD
LDO5VDD
LDO6VDD
LDO7VDD
LDO8VDD
LDO9VDD
LDO10VDD
PVDD
PVDD
PVDD
PVDD
DC-DC1 Power Ground
DC-DC1 Feedback Pin
DC-DC1 Inductor Connection
DC-DC1 Power Input (connect to PVDD system supply)
DC-DC2 Power Ground
DC-DC2 Feedback Pin
DC-DC2 Inductor Connection
DC-DC2 Power Input (connect to PVDD system supply)
DC-DC3 Power Ground
DC-DC3 Feedback Pin
DC-DC3 Inductor Connection
DC-DC3 Power Input (connect to PVDD system supply)
DC-DC4 Power Ground
DC-DC4 Feedback Pin
DC-DC4 Inductor Connection
DC-DC4 Power Input (connect to PVDD system supply)
LDO1 & LDO2 Power Input
LDO1 Power Output
LDO2 Power Output
LDO3 Power Input
LDO3 Power Output
LDO4 Power Input
LDO4 Power Output
LDO5 Power Input
LDO5 Power Output
LDO6 Power Input
LDO6 Power Output
LDO7 & LDO8 Power Input
LDO7 Power Output
LDO8 Power Output
LDO9 Power Input
LDO9 Power Output
LDO10 Power Output
LDO11 (Alive) Power Output
LDO12 (Internal VPMIC) Output;
Backup battery supply input / output
LDO13 (Internal INTVDD) Output; not for general use
LDO13 - Connect to LDO13VOUT1 (W7)
VPMIC
Voltage Reference capacitor connection point
Current Reference resistor connection point
PVDD
Status LED Driver 1. Open Drain Output
Status LED Driver 2. Open Drain Output
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PD, June 2012, Rev 4.0
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet WM8326.PDF ] | |
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