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PDF HD74LS48 Data sheet ( Hoja de datos )

Número de pieza HD74LS48
Descripción BCD-to-Seven-Segment Decoder / Driver
Fabricantes Renesas 
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No Preview Available ! HD74LS48 Hoja de datos, Descripción, Manual

HD74LS48
BCD-to-Seven-Segment Decoder / Driver (Internal Pull-up outputs)
REJ03D0411–0300
Rev.3.00
Jul.22.2005
HD74LS48 features active high outputs for driving lamp buffers. This circuit has full ripple blanking input / output
controls and a lamp test input. Display patterns for BCD input counts above 9 are unique symbols to authenticate input
conditions. This circuit incorporates automatic leading and / or trailing-edge zero-blanking control (RBI and RBO).
Lamp test (LT) of these types may be performed at any time when the BI / RBO node is at a high level. It contains an
overriding blanking input (BI) which can be used to control the lamp intensity be pulsing or to inhibit the outputs.
Inputs and outputs are entirely compatible for use with TTL or DTL logic outputs.
Features
Ordering Information
Part Name
HD74LS48P
Package Type
DILP-16 pin
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
Package
Abbreviation
P
Taping Abbreviation
(Quantity)
Pin Arrangement
B
Inputs
C
Lamp
Test
BI/RBO
1
2
3
4
RBI 5
D6
Inputs
A7
GND 8
B
C
LT
BI/RBO
RBI
D
A
f
g
a
b
c
d
e
16 VCC
15 f
14 g
13 a
12 b Outputs
11 c
10 d
9e
(Top view)
Rev.3.00, Jul.22.2005, page 1 of 6

1 page




HD74LS48 pdf
HD74LS48
Testing Method
Test Circuit
4.5V
Input
P.G.
Zout = 50
VCC
A
B
C
D
LT
RBI
BI/RBO
a
b
c
d
e
f
g
Output
RL
CL
Waveform
Input
tTLH
10%
90%
1.3 V
tPLH
tTHL
90%
1.3 V
10%
tPHL
In phase output
1.3 V
tPHL
1.3 V
tPLH
Out of phase output
1.3 V
1.3 V
3V
0V
VOH
VOL
VOH
VOL
Testing Table
Item
tPLH
tPHL
RBI
4.5 V
4.5 V
4.5 V
IN
D
GND
GND
GND
GND
Inputs
C
GND
GND
4.5 V
GND
B
GND
4.5 V
4.5 V
GND
A
IN
IN
IN
GND
a
OUT
OUT
OUT
b
OUT
OUT
c
OUT
OUT
Outputs
d
OUT
OUT
OUT
e
OUT
OUT
OUT
OUT
f
OUT
OUT
OUT
g
OUT
Rev.3.00, Jul.22.2005, page 5 of 6

5 Page










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