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PDF KS8852HLE Data sheet ( Hoja de datos )
| Número de pieza | KS8852HLE | |
| Descripción | Two-Port 10/100 Mb/s Ethernet Switch | |
| Fabricantes | Micrel Semiconductor | |
| Logotipo |  |
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KS8852HLE
Two-Port 10/100 Mb/s Ethernet Switch with
8 or 16-Bit Host Interface
Revision 1.0
General Description
The KSZ8852 product line consists of industrial capable
Ethernet switches, providing integrated communication for
a range of Industrial Ethernet and general Ethernet
applications.
The KSZ8852 product enables distributed, daisy-chained
topologies preferred for industrial Ethernet networks.
Conventional centralized (i.e., star-wired) topologies are
also supported for fault tolerant arrangements.
A flexible 8 or 16-bit general bus interface is provided for
interfacing to an external host processor.
The wire-speed, store-and-forward switching fabric
provides a full complement of QoS and congestion control
features optimized for real-time Ethernet.
The KSZ8852 product is built upon Micrel’s industry-
leading Ethernet technology, with features designed to
offload host processing and streamline your overall design:
• Wire-speed Ethernet switching fabric with extensive
filtering
• Two integrated 10/100BASE-TX PHY transceivers,
featuring the industry’s lowest power consumption
• Full-featured QoS support
• Flexible management options that support common
standard interfaces
A robust assortment of power management features
including energy-efficient Ethernet (EEE) have been
designed in to satisfy energy-efficient environments.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
KSZ8852 Top Level Architecture
LinkMD is a registered trademark of Micrel, Inc.
ETHERSYNCH is a trademark of Micrel, Inc.
Magic Packet is a registered trademark of Advanced Micro Devices, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
June 23, 2014
Revision 1.0
1 page  
Micrel, Inc.
KSZ8852HLE
Ordering Information
Part Number
Temperature
Range
KSZ8852HLECA(1)
0°C to +70°C
KSZ8852HLEWA
−40°C to +105°C
KSZ8852HLEYA
−40°C to +115°C
KSZ8852HLE-EVAL
Note:
1. Contact Micrel for availability.
Package
Lead Finish Description
64−Pin 10x10mm
LQFP with
exposed pad
Sn Commercial Temperature Range Switch
64−Pin 10x10mm
LQFP with
exposed pad
Sn
Extended (105°C) Industrial Temperature
Range Switch
64−Pin 10x10mm
LQFP with
exposed pad
Sn
Extended (115°C) Industrial Temperature
Range Switch
KSZ8852 Evaluation Board
Revision History
Revision
1.0
Date
11/21/13
Summary of Changes
Initial Draft
June 23, 2014
5
Revision 1.0
5 Page 
Micrel, Inc.
KSZ8852HLE
Wake-Up Frame 3 Byte Mask 2 Register (0x168 – 0x169): WF3BM2 ........................................................................... 154
Wake-Up Frame 3 Byte Mask 3 Register (0x16A - 0x16B): WF3BM3 ........................................................................... 155
0x16C – 0x16F: Reserved............................................................................................................................................... 155
Internal I/O Register Space Mapping for the Queue Management Unit (QMU) (0x170 - 0x1FF) ..................................... 156
Transmit Control Register (0x170 - 0x171): TXCR ......................................................................................................... 156
Transmit Status Register (0x172 - 0x173): TXSR ........................................................................................................... 157
Receive Control Register 1 (0x174 - 0x175): RXCR1..................................................................................................... 157
Receive Control Register 2 (0x176 - 0x177): RXCR2..................................................................................................... 158
TXQ Memory Information Register (0x178 - 0x179): TXMIR .......................................................................................... 159
0x17A - 0x17B: Reserved................................................................................................................................................ 159
Receive Frame Header Status Register (0x17C - 0x17D): RXFHSR ............................................................................. 159
Receive Frame Header Byte Count Register (0x17E - 0x17F): RXFHBCR ................................................................... 160
TXQ Command Register (0x180 - 0x181): TXQCR ........................................................................................................ 161
RXQ Command Register (0x182 - 0x183): RXQCR ....................................................................................................... 161
TX Frame Data Pointer Register (0x184 - 0x185): TXFDPR .......................................................................................... 162
RX Frame Data Pointer Register (0x186 - 0x187): RXFDPR ......................................................................................... 163
0x188 - 0x18B: Reserved ................................................................................................................................................ 163
RX Duration Timer Threshold Register (0x18C - 0x18D): RXDTTR ............................................................................... 163
RX Data Byte Count Threshold Register (0x18E - 0x18F): RXDBCTR .......................................................................... 163
Internal I/O Register Space Mapping for Interrupt Registers (0x190 - 0x193) ................................................................... 164
Interrupt Enable Register (0x190 - 0x191): IER .............................................................................................................. 164
Interrupt Status Register (0x192-– 0x193): ISR .............................................................................................................. 165
0x194 - 0x19B: Reserved ................................................................................................................................................ 166
Internal I/O Register Space Mapping for the Queue Management Unit (QMU) (0x19C - 0x1B9)..................................... 167
RX Frame Count and Threshold Register (0x19C -0x19D): RXFCTR............................................................................ 167
TX Next Total Frames Size Register (0x19E - 0x19F): TXNTFSR ................................................................................. 167
MAC Address Hash Table Register 0 (0x1A0 - 0x1A1): MAHTR0 ................................................................................. 167
Multicast Table Register 0 ........................................................................................................................................... 167
MAC Address Hash Table Register 1 (0x1A2 - 0x1A3): MAHTR1 ................................................................................. 168
Multicast Table Register 1 ........................................................................................................................................... 168
MAC Address Hash Table Register 2 (0x1A4 - 0x1A5): MAHTR2 ................................................................................. 168
Multicast Table Register 2 ........................................................................................................................................... 168
MAC Address Hash Table Register 3 (0x1A6 - 0x1A7): MAHTR3 ................................................................................. 168
Multicast Table Register 3 ........................................................................................................................................... 168
0x1A8 - 0x1AF: Reserved ............................................................................................................................................... 168
Flow Control Low Water Mark Register (0x1B0 - 0x1B1): FCLWR................................................................................. 168
Flow Control High Water Mark Register (0x1B2 - 0x1B3): FCHWR ............................................................................... 169
Flow Control Overrun Water Mark Register (0x1B4 - 0x1B5): FCOWR ......................................................................... 169
0x1B6 - 0x1B7: Reserved RX Frame Count Register (0x1B8 - 0x1B9): RXFC.............................................................. 169
0x1BA - 0x747: Reserved................................................................................................................................................ 170
Analog Control 1 Register (0x748 - 0x749): ANA_CNTRL_1 ......................................................................................... 170
0x74A - 0x74B: Reserved................................................................................................................................................ 170
Analog Control 3 Register (0x74C - 0x74D): ANA_CNTRL_3 ........................................................................................ 170
0x74E - 0x7FF: Reserved................................................................................................................................................ 170
Management Information Base (MIB) Counters ................................................................................................................. 171
MIB Counter Examples:................................................................................................................................................... 173
Additional MIB Information .............................................................................................................................................. 173
Static MAC Address Table .................................................................................................................................................. 174
Static MAC Table Lookup Examples:.............................................................................................................................. 175
Dynamic MAC Address Table ............................................................................................................................................. 176
Dynamic MAC Address Lookup Example: ...................................................................................................................... 176
VLAN Table ......................................................................................................................................................................... 177
VLAN Table Lookup Examples: ...................................................................................................................................... 177
Absolute Maximum Ratings(2) ............................................................................................................................................. 178
Operating Ratings(3) ............................................................................................................................................................ 178
Electrical Characteristics(5) .................................................................................................................................................. 178
Timing Specifications .......................................................................................................................................................... 183
June 23, 2014
11
Revision 1.0
11 Page | ||
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| PDF Descargar | [ Datasheet KS8852HLE.PDF ] | |
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