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Número de pieza | NTD4854N | |
Descripción | Power MOSFET ( Transistor ) | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NTD4854N
Power MOSFET
25 V, 128 A, Single N--Channel, DPAK/IPAK
Features
• Trench Technology
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb--Free Devices
Applications
• VCORE Applications
• DC--DC Converters
• High/Low Side Switching
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain--to--Source Voltage
Gate--to--Source Voltage
Continuous Drain
Current RθJA
(Note 1)
TA = 25°C
TA = 85°C
VDSS
VGS
ID
25
±20
20.8
16.1
V
V
A
Power Dissipation
RθJA (Note 1)
Continuous Drain
Current RθJA
(Note 2)
Power Dissipation
RθJA (Note 2)
Continuous Drain
Current RθJC
(Note 1)
TA = 25°C
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TC = 25°C
TC = 85°C
PD
ID
PD
ID
2.5
15.7
12.2
1.43
128
99
W
A
W
A
Power Dissipation
RθJC (Note 1)
TC = 25°C PD 93.75 W
Pulsed Drain
Current
tp=10ms TA = 25°C
IDM
255 A
Current Limited by Package
TA = 25°C
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
Single Pulse Drain--to--Source Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL = 26 Apk, L = 1.0 mH, RG = 25 Ω)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
IDmaxPkg
TJ,
TSTG
IS
dV/dt
EAS
TL
45
--55 to
+175
78
6
338
260
A
°C
A
V/ns
mJ
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
V(BR)DSS
25 V
RDS(ON) MAX
3.6 mΩ @ 10 V
4.7 mΩ @ 4.5 V
D
ID MAX
128 A
G
S
N--CHANNEL MOSFET
4
4
4
12
3
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
1 23
1 23
CASE 369AC CASE 369D
3 IPAK
IPAK
(Straight Lead) (Straight Lead
DPAK)
4
Drain
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
2
1 Drain 3
Gate Source
1 23
Gate Drain Source
1
23
Gate Drain Source
Y = Year
WW = Work Week
4854N = Device Code
G = Pb--Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
June, 2010 -- Rev. 2
1
Publication Order Number:
NTD4854N/D
1 page NTD4854N
TYPICAL PERFORMANCE CURVES
6000
5500
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
00
VGS = 0 V
Ciss TJ = 25°C
Coss
Crss
2.5 5 7.5 10 12.5 15 17.5
DRAIN--TO--SOURCE VOLTAGE (VOLTS)
20
Figure 7. Capacitance Variation
1000
100
VDD = 10 V
ID = 15 A
VGS = 10 V
10
td(off)
tr
tf
td(on)
11
1000
10
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
100
100 10 ms
100 ms
10
VGS = 20 V
SINGLE PULSE
1 TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
0.1
0.1
PACKAGE LIMIT
1
10
1 ms
10 ms
dc
100
VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
12
QT
10
8
6 VGS
4 Q1
Q2
2
ID = 30 A
VDD = 15 V
00
TJ = 25°C
10 20 30 40 50 60 70 80
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate--To--Source and Drain--To--Source
Voltage vs. Total Charge
30
VGS = 0 V
25 TJ = 25°C
20
15
10
5
00.5 0.6
0.7 0.8
0.9
VSD, SOURCE--TO--DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
360
320 ID = 26 A
280
240
200
160
120
80
40
025 50
75
100
125 150
175
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet NTD4854N.PDF ] |
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