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PDF HGS128646-Y-EH Data sheet ( Hoja de datos )
| Número de pieza | HGS128646-Y-EH | |
| Descripción | OLED Module | |
| Fabricantes | Good Display Technology | |
| Logotipo |  |
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OLED 模组
型 号:
HGS128646-Y-EH
版 本:
B
网 址 : www.chinalcdmodule.com
清达光电技术有限公司
杭州佳显科技有限公司
1 page  
清达光电技术有限公司
1. 简介
1.1 模块规格
项目
显示类型
数据输入
占空比
驱动 IC
外壳
工作温度
储存温度
其他
1.2 尺寸参数
项目
外形尺寸
可视区
有效区
点阵
点距离
点大小
1.3 原理结构图
版本 B
HGS128646-Y-EH
规格
OLED/黄字
8-bits 80、串行
1/64
SSD1325
0.7 T
-30 oC ~70 oC
-40 oC ~ 80 oC
规格
93.0(W)×70.0(H)×9.4MAX.(T)
65.0(W)×33.0(H)
61.41(W)×30.69(H)
128 DOTS×64 DOTS
0.48(W)×0.48(H )
0.455(W)×0.455(H)
单位
mm
mm
mm
---
mm
mm
备注
VSS
VDD
/REST
A0
/WR
/RD
DB0~DB7
/CS
COM1~63
Controller
SSD1325
SEG1~128
COM2~64
www.chinalcdmodule.com
-4-
5 Page 
清达光电技术有限公司
版本 B
HGS128646-Y-EH
(4) Refer to Figure 38 for Form 2 8080-Series MPU Parallel Interface Timing Characteristics
In order to match the operating frequency of display RAM with that of the microprocessor, some pipeline
processing is internally performed which requires the insertion of a dummy read before the first actual display
data read. This is shown in Figure 8.
Figure 8: Display data read back procedure - insertion of dummy read
5.1.2 MPU Serial Interface
The serial interface consists of serial clock SCLK, serial data SDIN, D/C#, CS#. In SPI mode, D0 acts as SCLK,
D1 acts as SDIN. For the unused data pins, D2 should be left open. The pins from D3 to D7and R/W# can be
connected to an external ground. E must be connected to an external high level.
Table 10: Control pins of Serial interface
SDIN is shifted into an 8-bit shift register on every rising edge of SCLK in the order of D7, D6, ... D0. D/C# is
sampled on every eighth clock and the data byte in the shift register is written to the Graphic Display Data RAM
(GDDRAM) or command register in the same clock.
Under serial mode, only write operations are allowed.
Figure 9: Display data write procedure in SPI mode
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