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PDF LC550EUQ-SCA2 Data sheet ( Hoja de datos )
| Número de pieza | LC550EUQ-SCA2 | |
| Descripción | WUXGA TFT LCD | |
| Fabricantes | LG | |
| Logotipo |  |
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Ver.1.0
Product Specification
CONTENTS
ITEM
COVER
CONTENTS
RECORD OF REVISIONS
GENERAL DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
INTERFACE CONNECTIONS
SIGNAL TIMING SPECIFICATIONS
LVDS Signal Specification
Color Data Reference
POWER SEQUENCE
OPTICAL SPECIFICATIONS
MECHANICAL CHARACTERISTICS
RELIABILITY
INTERNATIONAL STANDARDS
SAFETY
EMI
ENVIRONMENT
PACKING
INFORMATION OF LCM LABEL
PACKING FORM
PRECAUTIONS
MOUNTING PRECAUTIONS
OPERATING PRECAUTIONS
ELECTROSTATIC DISCHARGE CONTROL
PRECAUTIONS FOR STRONG LIGHT EXPOSURE
STORAGE
HANDLING PRECAUTIONS FOR PROTECTION FILM
LC550EUQ
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Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
LC550EUQ
Table 2. ELECTRICAL CHARACTERISTICS
Parameter
Circuit :
Power Input Voltage
Power Input Current
Power Consumption
Rush current
Symbol
Min
VLCD
ILCD
PLCD
IRUSH
10.8
ࣩ
-
ࣩ
-
Value
Typ
Max
12.0
ࣵࣵ࣬
1,940
࣭࣭࣪ࣵ
ࣩ
13.2
࣭࣮ࣨࣴࣳ
2,520
ࣱࣱ࣭࣪
15
Unit
VDC
mA
mA
Watt
A
Note
1
2
1
3
Note 1. The specified current and power consumption are under the VLCD=12.0V, Ta=25 r 2¶C, fV=240Hz
condition whereas mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
White : 1023 Gray
Black : 0 Gray
Ver.1.0
Mosaic Pattern(8 x 6)
4 /46
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Product Specification
3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LC550EUQ
LVDS +
# V CM = {( LVDS +) + ( LVDS - )} /2
0V
Description
Symbol
LVDS Common mode Voltage
LVDS Input Voltage Range
Change in common mode Voltage
VCM
VIN
ȟVCM
Min
1.0
0.7
V CM
V IN _ MAX V IN _ MIN
Max Unit
1.5 V
1.8 V
250 mV
Note
-
-
-
2) AC Specification
LVDS Clock
LVDS Data
LVDS 1’st Clock
LVDS 2nd / 3rd / 4th Clock
A
t tSKEW SKEW
Tclk
( Fclk = 1 /Tclk )
Tclk
tSKEW_min tSKEW_max
Description
Symbol Min
Max Unit
LVDS Differential Voltage
High Threshold VTH
100
300 mV
Low Threshold VTL -300 -100 mV
LVDS Clock to Data Skew
tSKEW
|(0.25*Tclk)/7| ps
LVDS Clock/DATA Rising/Falling time
tRF 260 |(0.3*Tclk)/7| ps
Effective time of LVDS
teff |·360|
ps
LVDS Clock to Clock Skew (Even to Odd)
tSKEW_EO
|1/7* Tclk|
ps
Note 1. All Input levels of LVDS signals are based on the EIA 644 Standard.
2. If tRF isn’t enough, teff should be meet the range.
3. LVDS Differential Voltage is defined within teff
Ver.1.0
A
80%
20%
tRF
Note
3
-
2
-
-
10 /46
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LC550EUQ-SCA2.PDF ] | |
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