|
|
PDF VT6130 Data sheet ( Hoja de datos )
| Número de pieza | VT6130 | |
| Descripción | PCI Express Gigabit Ethernet Controller | |
| Fabricantes | VIA | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de VT6130 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
Data Sheet
VT6130
PCI Express Gigabit
Ethernet Controller
with
ACPI and Management Functions
(Released under Creative Commons License)
Preliminary Revision 1.0
November 28, 2008
VIA TECHNOLOGIES, INC.
1 page  
LIST OF FIGURES
VT6130 Data Sheet
FIGURE 1. INTERNAL BLOCK DIAGRAM............................................................................................................................... 3
FIGURE 2. PIN DIAGRAM ............................................................................................................................................................ 4
FIGURE 3. CASE 0 ........................................................................................................................................................................ 66
FIGURE 4. CASE 1 ........................................................................................................................................................................ 66
FIGURE 5. CASE 2 ........................................................................................................................................................................ 66
FIGURE 6. CASE 3 ........................................................................................................................................................................ 67
FIGURE 7. QFN-64 PACKAGE (9 × 9 MM) ............................................................................................................................... 74
LIST OF TABLES
TABLE 1. PIN LIST ......................................................................................................................................................................... 5
TABLE 2. SIGNAL TYPE DEFINITIONS .................................................................................................................................... 6
TABLE 3. PIN DESCRIPTIONS .................................................................................................................................................... 6
TABLE 4. PCI CONFIGURATION REGISTER MAP .............................................................................................................. 11
TABLE 5. PCI EXPRESS EXTENDED CAPABILITIES STRUCTURE ( > FF H)................................................................ 12
TABLE 6. MII REGISTERS NAMES & ADDRESSES ............................................................................................................. 15
TABLE 7. TX DESCRIPTOR COMMAND BLOCK STRUCTURE........................................................................................ 58
TABLE 8. RECEIVE DESCRIPTOR FORMAT (RD)............................................................................................................... 60
TABLE 9. LED SELECT ............................................................................................................................................................... 67
TABLE 10. ABSOLUTE MAXIMUM RATINGS....................................................................................................................... 73
TABLE 11. DC SPECIFICATIONS.............................................................................................................................................. 73
Preliminary Revision 1.0, November 28, 2008
-iii-
Table of Contents
5 Page 
VT6130 Data Sheet
Table 2. Signal Type Definitions
Type
I
O
I/O
T/S
OD
ADIFF
ABIAS
Description
Input. Standard input-only signal.
Output. Standard active output driver.
Input/output. An input/output signal.
Tri-state. Inactive bi-directional input/output pin.
Open drain. Allows multiple devices to share as a wire-OR.
Analog differential. Signal pair for the twisted-pair interface.
Analog bias or reference signal. Must be tied to external resistor and/or capacitor bias network, as
shown in the system schematic.
Pin Descriptions
Signal Name
TDP
TDN
RDP
RDN
REFCLKP
REFCLKN
PERST_
Pin #
7
8
11
12
15
16
19
CLKREQ#
20
Signal Name
SMBCLK
SMBDATA
Pin #
2
3
Signal Name
JVEESEL
ECS
EDI / SPIDI
EDO / SPIDO
ESK / SPISK
Pin #
31
24
27
26
28
Table 3. Pin Descriptions
I/O
ADIFF
PCI Express Interface
Signal Description
PCI Express Transmitter Differential Pair.
ADIFF PCI Express Receiver Differential Pair.
I PCI Express Differential Clock. The PCI Express externally provided
differential clock with 100Mhz +- 300ppm. Spread Spectrum Clocking
(SSC) is allowed
I PCI Express Reset. When PERST_ is asserted low, the chip performs an
internal system hardware reset. PERST_ may be asynchronous to CLK
asserted or deasserted. It is recommended that the deassertion be
synchronous to guarantee clean and bounce free edge.
The PERST_ assertion/deassertion should meet the timing spec defined in
PCI Express Card Electromechanical Specification Revision 1.1a.
OD Clock Request. When CLKREQ# is disabled, it indicates that the device is
ready for the reference clock to transition from the active clock state to a
parked clock state. The CLKREQ# assertion/ deassertion is asynchronous to
reference clock and should meet the timing spec defined in PCI Express
Card Electromechanical Specification Revision 1.1
SMBus Interface
I/O Signal Description
O/D SMBus Interface Clock.
O/D SMBus Interface Data.
Local Memory Interface
I/O Signal Description
O Virtual EEPROM Selection.
O EEPROM Chip Select. Chip select signal of the external EEPROM
O EEPROM Data In. External serial EEPROM data input.
I EEPROM Data Out. External serial EEPROM data output.
O EEPROM Clock. External serial EEPROM clock
Preliminary Revision 1.0, November 28, 2008
-6-
Pin Descriptions
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet VT6130.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| VT6130 | PCI Express Gigabit Ethernet Controller | VIA |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |