|
|
PDF VS23S010C Data sheet ( Hoja de datos )
| Número de pieza | VS23S010C | |
| Descripción | 1 Megabit SPI SRAM | |
| Fabricantes | VLSI | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de VS23S010C (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
VS23S010C Datasheet
VS23S010C-L - 1 Megabit SPI SRAM
with Serial and Parallel Interfaces
and Integrated Video Display Controller
Features
Description
• Flexible 1.5V - 3.6V operating voltage
• 131,072 x 8-bit SRAM organization
• Serial Peripheral Interface (SPI) mode
0 compatible
– Byte, Page and Sequential modes
– Supports Single, Dual and Quad
I/O read and write
– Fast operation: the whole mem-
ory can be filled in 262158 or read
in 262159 cycles (Quad-I/O SPI,
Quad address mode)
– XHOLD and XWP pins
• 8-bit Parallel Interface (Simplified 8080
and NAND FLASH Type Interface)
– Sequential read and write in 4 byte
blocks
– Fast operation, the whole memory
can be filled or read in 131077 cy-
cles
• Integrated Video Display Controller with
Video DAC
– Supports NTSC and PAL video for-
mats
– Fully configurable by user
– 9-bit Video DAC and 8x Video PLL
• High operating frequencies
– Up to 36 MHz for SPI
The VLSI Solution VS23S010C-L is an easy-
to-use and versatile serial SRAM device. The
memory is accessed via an SPI compatible
serial bus. The device also contains Video
Display Controller, which can be configured
to continuously output analog video from the
memory array data to implement a video frame
buffer.
Alternatively, a 8-bit parallel interface can be
used to access the SRAM instead of the SPI.
To sum up, there are four separate operating
modes in VS23S010C-L:
• SPI Single, Dual, or Quad operation and
4 General Purpose I/O pins
• SPI Single, Dual, or Quad operation and
simultaneous Video Display Controller
• 8-bit Parallel Interface operation
• 8-bit Parallel Interface operation and si-
multaneous Video Display Controller
Applications
• Microcontroller RAM extension
• VoIP and internet data stream buffer
• Audio data buffer
• Video frame buffer
– Over 35 MHz for Video Display Con-
troller
1
– 15 MHz for 8-bit parallel interface
– (TBD) MHz for SRAM writes when
Video Display Controller enabled
• Active Low-power
– Read current 200 µA at 1 MHz (Sin-
gle I/O, SO=0, TA=+85◦C, VDD=3.3V)
SO/IO1
GND0
VideoOut #2
VideoOut #3
VideoOut #0
VideoOut #1
GND1
XWP/IO2
VXTALOUT
VXTALIN
XHOLD/IO3
SCLK
GND3
• Industrial temperature range
– -40◦C to + 85◦C
• Pb-Free and RoHS compliant
Figure 1: LQFP48 pin out (not to scale)
Version: 0.9 [Preliminary], 2015-01-16
1
1 page  
VS23S010C Datasheet
CONTENTS
7.1.2 Quad-Output Read (6Bh and EBh) . . . . . . . . . . . . . . . . . . . 57
7.2 SPI Write Commands (02h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
7.2.1 Dual-Input Write (A2h and 22h) . . . . . . . . . . . . . . . . . . . . . 60
7.2.2 Quad-Input Write (32h and B2h) . . . . . . . . . . . . . . . . . . . . . 60
7.3 SPI Miscellaneous Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
7.3.1 Read Status Register (05h) . . . . . . . . . . . . . . . . . . . . . . . 62
7.3.2 Write Status Register (01h) . . . . . . . . . . . . . . . . . . . . . . . 63
7.3.3 Read Manufacturer and Device ID (9Fh) . . . . . . . . . . . . . . . . 63
7.3.4 Read GPIO Control Register (84h) . . . . . . . . . . . . . . . . . . . 65
7.3.5 Write GPIO Control Register (82h) . . . . . . . . . . . . . . . . . . . 66
7.3.6 Read GPIO State Register (86h) . . . . . . . . . . . . . . . . . . . . 66
7.3.7 Read Multi-IC Control Register (B7h) . . . . . . . . . . . . . . . . . . 67
7.3.8 Write Multi-IC Control Register (B8h) . . . . . . . . . . . . . . . . . . 68
8 Video Display Controller Commands
70
8.1 Write Picture Start (28h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
8.2 Write Picture End (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
8.3 Write Line Length (2Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
8.4 Write Video Display Controller Control1 (2Bh) . . . . . . . . . . . . . . . . . . . 72
8.5 Write Picture Index Start Address (2Ch) . . . . . . . . . . . . . . . . . . . . . . 74
8.6 Write Video Display Controller Control2 (2Dh) . . . . . . . . . . . . . . . . . . . 74
8.7 Write U Table (2Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
8.8 Write V Table (2Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
8.9 Write Program (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
8.10 Read Current Line and PLL Lock (53h) . . . . . . . . . . . . . . . . . . . . . . . 79
8.11 Write Block Move Control1 (34h) . . . . . . . . . . . . . . . . . . . . . . . . . . 80
8.12 Write Block Move Control2 (35h) . . . . . . . . . . . . . . . . . . . . . . . . . . 82
8.13 Start Block Move (36h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
9 8-Bit Parallel Interface Commands and Addressing
85
9.1 8-Bit Parallel Interface Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
9.2 8-Bit Parallel Interface Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
10 Known Issues
88
10.1 Powering Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
10.2 Idle Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
11 Document Version Changes
89
12 Contact Information
91
Version: 0.9 [Preliminary], 2015-01-16
5
5 Page 
3.3.2 SPI Mode
VS23S010C Datasheet
3 ELECTRICAL CHARACTERISTICS & SPECIFICATIONS
VDD = 3.3 V, TA = -40 ... +85 ◦C
Parameter
Symbol Min Max Unit Test Conditions
SPI clock frequency (read) 1 FSCLK
12 MHz VDD = 1.5 V
18 MHz VDD = 1.8 V
33 MHz VDD = 3.0 V
36 MHz
SPI clock frequency (write) 1 FSCLK
27 MHz VDD = 1.5 V
27 MHz VDD = 1.8 V
48 MHz VDD = 3.0 V
48 MHz
XCS high time
Txcsh
14
ns
XCS low setup time
Txcsls
6
ns
XCS low hold time
Txcslh
5
ns
XCS high setup time
Txcshs
8
ns
XCS high hold time
Txcshh 0.5 ∗ TSCLK + 5
ns
XHOLD low setup time
Txhls
5
ns
XHOLD low hold time
Txhlh
3
ns
XHOLD high setup time
Txhhs
5
ns
XHOLD high hold time
Txhhh
3
ns
XHOLD low to output High-Z Txhlz
6
ns
XHOLD high to output valid Txhhz
6 ns
XWP low setup time
Txwls
5
ns
XWP low hold time
Txwlh
3
ns
XWP high setup time
Txwhs
5
ns
XWP high hold time
Txwhh
3
ns
1 When used with an external micro-controller the maximum SPI frequency is based on the
total of VS23S010C-L and micro-controller I/O-delays and routing delays of the card.
XCS
Txcsls
SCLK
Tds
SI
Tclkh
Tdh
MSB
Txcslh
Tclkl
Txcsh
Txcshh
Txcshs
High−Impedance
SO
Figure 3: SPI Input Timing
Version: 0.9 [Preliminary], 2015-01-16
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet VS23S010C.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| VS23S010C | 1 Megabit SPI SRAM | VLSI |
| VS23S010C-S | 1 Megabit SPI SRAM | VLSI |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |