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PDF FXMAR2102 Data sheet ( Hoja de datos )

Número de pieza FXMAR2102
Descripción 2-Bit Voltage Translator / Isolator
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FXMAR2102 Hoja de datos, Descripción, Manual

October 2011
FXMAR2102
Dual-Supply, 2-Bit Voltage Translator / Isolator for
I2C Applications
Features
Bi-Directional Interface between Any Two Levels:
1.65V to 5.5V
No Direction Control Needed
Internal 10K Pull-Up Resistors
System GPIO Resources Not Required when OE
Tied to VCCA
I2C-Bus® Isolation
A/B Port VOL = 175mV (Typical), VIL = 150mV,
IOL = 6mA
Open-Drain Inputs / Outputs
Works in Push Pull Environment
Accommodates Standard-Mode and Fast-Mode
I2C-Bus Devices
Supports I2C Clock Stretching & Multi-Master
Fully Configurable: Inputs and Outputs Track VCC
Non-Preferential Power-Up; Either VCC Can
Power-Up First
Outputs Switch to 3-State if Either VCC is at GND
Tolerant Output Enable: 5V
Packaged in 8-Terminal Leadless MicroPak™
(1.6mm x 1.6mm) and Ultrathin MLP
(1.2mm x 1.4mm)
ESD Protection Exceeds:
- B Port: 8kV HBM ESD (vs. GND & vs. VCCB)
- All Pins: 4kV HBM ESD (per JESD22-A114)
- 2kV CDM (per JESD22-C101)
Description
The FXMAR2102 is a high-performance configurable
dual-voltage-supply translator for bi-directional voltage
translation over a wide range of input and output
voltages levels. The FXMAR2102 also works in a push-
pull environment.
It is intended for use as a voltage translator between
I2C-Bus® compliant masters and slaves. Internal 10K
pull-up resistors are provided.
The device is designed so the A port tracks the VCCA
level and the B port tracks the VCCB level. This allows for
bi-directional A/B-port voltage translation between any
two levels from 1.65V to 5.5V. VCCA can equal VCCB from
1.65V to 5.5V. Either VCC can be powered-up first.
Internal power-down control circuits place the device in
3-state if either VCC is removed.
The two ports of the device have automatic direction-
sense capability. Either port may sense an input signal
and transfer it as an output signal to the other port.
Ordering Information
Part Number
FXMAR2102L8X
FXMAR2102UMX
Operating
Temperature Range
-40 to +85°C
Top
Mark
BU
Package
8-Lead MicroPak™, 1.6mm Wide
8-Lead Ultrathin MLP, 1.2mm x 1.4mm
Packing
Method
5000 Units on
Tape and Reel
© 2010 Fairchild Semiconductor Corporation
FXMAR2102 • Rev. 0.0.7
www.fairchildsemi.com

1 page




FXMAR2102 pdf
Functional Description
Power-Up / Power-Down Sequencing
FXM translators offer an advantage in that either VCC
may be powered up first. This benefit derives from the
chip design. When either VCC is at 0V, outputs are in a
high-impedance state. The control input (OE) is
designed to track the VCCA supply. A pull-down resistor
tying OE to GND should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up/-down. The size of the pull-down
resistor is based upon the current-sinking capability of
the device driving the OE pin.
The recommended power-up sequence is:
1. Apply power to the first VCC.
2. Apply power to the second VCC.
3. Drive the OE input HIGH to enable the device.
The recommended power-down sequence is:
1. Drive OE input LOW to disable the device.
2. Remove power from either VCC.
3. Remove power from the other VCC.
Note:
4. Alternatively, the OE pin can be hardwired to VCCA
to save GPIO pins. If OE is hardwired to VCCA,
either VCC can be powered up or down first.
Application Circuit
Figure 4. Application Circuit
© 2011 Fairchild Semiconductor Corporation
FXMAR2102 • Rev. 1.0.0
5
www.fairchildsemi.com

5 Page





FXMAR2102 arduino
AC Characteristics(15)
Output Load: CL = 50pF, RPU = NC, push / pull driver, and TA = -40°C to +85°C.
Symbol
Parameter
VCCB
4.5 to 5.5V 3.0 to 3.6V 2.3 to 2.7V 1.65 to 1.95V Units
Typ. Max. Typ. Max. Typ. Max. Typ. Max.
VCCA = 4.5 to 5.5V
tPLH
A to B
B to A
1
1
3
3
1
2
3
4
1
3
3
5
1
4
3
7
ns
tPHL
A to B
B to A
2
2
4
4
3
2
5
5
4
2
6
6
5
5
7
7
ns
tPZL
OE to A
OE to B
4
3
5
5
6 10 5
475
9
8
7 15
10 15
ns
tPLZ
OE to A
OE to B
65
5
100
9
65
6
105
10
65
7
105
12
65
9
105
16
ns
tskew
A Port, B Port(16)
0.50 1.50 0.50 1.00 0.50 1.00 0.50 1.00 ns
VCCA = 3.0 to 3.6V
tPLH
A to B
B to A
2.0 5.0 1.5 3.0 1.5 3.0 1.5 3.0
1.5 3.0 1.5 4.0 2.0 6.0 3.0 9.0
ns
tPHL
A to B
B to A
2.0 4.0 2.0 4.0 2.0 5.0 3.0 5.0
2.0 4.0 2.0 4.0 2.0 5.0 3.0 5.0
ns
tPZL
OE to A
OE to B
4.0
4.0
8.0
8.0
5.0
6.0
9.0
9.0
6.0 11.0 7.0 15.0
8.0 11.0 10.0 14.0
ns
tPLZ
tskew
OE to A
OE to B
A Port, B Port(16)
100 115 100 115 100 115 100 115
5 10 4 8 5 10 9 15
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0
ns
ns
VCCA = 2.3 to 2.7V
tPLH
A to B
B to A
2.5
1.5
5.0
3.0
2.5
2.0
5.0
4.0
2.0
3.0
4.0
6.0
1.0 3.0
5.0 10.0
ns
tPHL
A to B
B to A
2.0 5.0 2.0 5.0 2.0 5.0 3.0 6.0
2.0 5.0 2.0 5.0 2.0 5.0 3.0 6.0
ns
tPZL
OE to A
OE to B
5.0 10.0 5.0 10.0 6.0 12.0 9.0 18.0
4.0 8.0 4.5 9.0 5.0 10.0 9.0 18.0
ns
tPLZ
tskew
OE to A
OE to B
A Port, B Port(16)
100 115 100 115 100 115 100 115
65 110 65 110 65 115 12
25
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0
ns
ns
VCCA = 1.65 to 1.95V
tPLH
A to B
B to A
4
1.0
7
2.0
4
1.0
7
2.0
5
1.5
8
3.0
5 10
5.0 10.0
ns
tPHL
A to B
B to A
5
4
8
8
3
3
7
7
3
3
7
7
3
3
7
7
ns
tPZL
OE to A
OE to B
11 15 11 14 14 28 14
6 14 6 14 6 14 9
23
16
ns
tPLZ
tskew
OE to A
OE to B
A Port, B Port(16)
75 115 75 115 75 115 75 115
75 115 75 115 75 115 75 115
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0
ns
ns
Notes:
15. AC characteristics are guaranteed by design and characterization.
16. Skew is the variation of propagation delay between output signals and applies only to output signals on the same
port (An or Bn) and switching with the same polarity (LOW-to-HIGH or HIGH-to-LOW) (see Figure 15). Skew is
guaranteed; not production tested.
© 2011 Fairchild Semiconductor Corporation
FXMAR2102 • Rev. 1.0.0
11
www.fairchildsemi.com

11 Page







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