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Número de pieza | V390HJ1-P02 | |
Descripción | TFT LCD Module | |
Fabricantes | CMI MEI | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de V390HJ1-P02 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! PRODUCT SPECIFICATION
□ Tentative Specification
□ Preliminary Specification
■ Approval Specification
MODEL NO.: V390HJ1
SUFFIX: P02
Customer:
APPROVED BY
SIGNATURE
Name / Title
Note
Please return 1 copy for your confirmation with your signature and
comments.
Approved By
Chao-Chun Chung
Checked By
Vita Wu
Prepared By
Alan Hung
Version 4.0
1 Date:15 May 2013
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
1 page PRODUCT SPECIFICATION
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item
Storage Temperature
Operating Ambient Temperature
Symbol
TST
TOP
Value
Min. Max.
-20 +60
0 50
Note (1) Temperature and relative humidity range is shown in the figure below.
Unit Note
ºC (1)
ºC (1), (2)
(a) 90 %RH Max. (Ta ≦ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature
of display area from being over 65 ºC. The range of operating temperature may degrade in case of
improper thermal management in final product design.
Version 4.0
5 Date:15 May 2013
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
5 Page PRODUCT SPECIFICATION
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD OPEN CELL INPUT
CNF1 Connector Pin Assignment: (FI-RE51S-HF(JAE) or equivalent)
Pin Name
1 GND
2 N.C.
3 N.C.
4 N.C.
5 N.C.
6 N.C.
7 SELLVDS
8 N.C.
9 N.C
10 N.C.
11 GND
12 ERX0-
13 ERX0+
14 ERX1-
15 ERX1+
16 ERX2-
17 ERX2+
18 GND
19 ECLK-
20 ECLK+
21 GND
22 ERX3-
23 ERX3+
24 N.C.
25 N.C.
26 GND
27 GND
28 ORX0-
29 ORX0+
30 ORX1-
31 ORX1+
32 ORX2-
33 ORX2+
34 GND
35 OCLK-
36 OCLK+
37 GND
38 ORX3-
39 ORX3+
40 N.C.
41 N.C.
42 GND
43 GND
44 GND
45 GND
46 GND
47 N.C.
48 VCC
49 VCC
50 VCC
51 VCC
Description
Ground
No Connection
No Connection
No Connection
No Connection
No Connection
LVDS data format Selection
No Connection
No Connection
No Connection
Ground
Even pixel Negative LVDS differential data input. Channel 0
Even pixel Positive LVDS differential data input. Channel 0
Even pixel Negative LVDS differential data input. Channel 1
Even pixel Positive LVDS differential data input. Channel 1
Even pixel Negative LVDS differential data input. Channel 2
Even pixel Positive LVDS differential data input. Channel 2
Ground
Even pixel Negative LVDS differential clock input.
Even pixel Positive LVDS differential clock input.
Ground
Even pixel Negative LVDS differential data input. Channel 3
Even pixel Positive LVDS differential data input. Channel 3
No Connection
No Connection
Ground
Ground
Odd pixel Negative LVDS differential data input. Channel 0
Odd pixel Positive LVDS differential data input. Channel 0
Odd pixel Negative LVDS differential data input. Channel 1
Odd pixel Positive LVDS differential data input. Channel 1
Odd pixel Negative LVDS differential data input. Channel 2
Odd pixel Positive LVDS differential data input. Channel 2
Ground
Odd pixel Negative LVDS differential clock input
Odd pixel Positive LVDS differential clock input
Ground
Odd pixel Negative LVDS differential data input. Channel 3
Odd pixel Positive LVDS differential data input. Channel 3
No Connection
No Connection
Ground
Ground
Ground
Ground
Ground
No Connection
Power input (+12V)
Power input (+12V)
Power input (+12V)
Power input (+12V)
Note (1) LVDS connector pin order defined as follows
Note
(2)
(3)(4)
(2)
(2)
(2)
(5)
(5)
(5)
(2)
(5)
(5)
(5)
(2)
(2)
Version 4.0
11 Date:15 May 2013
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet V390HJ1-P02.PDF ] |
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