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PDF L6919CD Data sheet ( Hoja de datos )
| Número de pieza | L6919CD | |
| Descripción | 5 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER WITH DYNAMIC VID MANAGEMENT | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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L6919C
5 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER
WITH DYNAMIC VID MANAGEMENT
s 2 PHASE OPERATION WITH
SYNCRHONOUS RECTIFIER CONTROL
s ULTRA FAST LOAD TRANSIENT RESPONSE
s INTEGRATED HIGH CURRENT GATE
DRIVERS: UP TO 2A GATE CURRENT
s TTL-COMPATIBLE 5 BIT PROGRAMMABLE
OUTPUT FROM 0.800V TO 1.550V WITH
25mV STEPS
s DYNAMIC VID MANAGEMENT
s 0.6% OUTPUT VOLTAGE ACCURACY
s 10% ACTIVE CURRENT SHARING ACCURACY
s DIGITAL 2048 STEP SOFT-START
s OVERVOLTAGE PROTECTION
s OVERCURRENT PROTECTION REALIZED
USING THE LOWER MOSFET'S RdsON OR A
SENSE RESISTOR
s OSCILLATOR EXTERNALLY ADJUSTABLE
AND INTERNALLY FIXED AT 200kHz
s POWER GOOD OUTPUT AND INHIBIT
FUNCTION
s REMOTE SENSE BUFFER
s PACKAGE: SO-28
APPLICATIONS
s POWER SUPPLY FOR SERVERS AND
WORKSTATIONS
s POWER SUPPLY FOR HIGH CURRENT
MICROPROCESSORS
s DISTRIBUTED POWER SUPPLY
SO-28
ORDERING NUMBERS:L6919CD
L6919CDTR
DESCRIPTION
The device is a power supply controller specifically de-
signed to provide a high performance DC/DC conver-
sion for high current microprocessors. The device
implements a dual-phase step-down controller with a
180° phase-shift between each phase. A precise 5-bit
digital to analog converter (DAC) allows adjusting the
output voltage from 0.800V to 1.550V with 25mV binary
steps managing On-The-Fly VID code changes.
The high precision internal reference assures the se-
lected output voltage to be within ±0.6%. The high
peak current gate drive affords to have fast switching
to the external power mos providing low switching
losses.
The device assures a fast protection against load
over current and load over/under voltage. An internal
crowbar is provided turning on the low side mosfet if
an over-voltage is detected. In case of over-current,
the system works in Constant Current mode.
BLOCK DIAGRAM
PGOO D
OSC / INH
S GN D
PW M1
VCC DR
HS
BO O T1
UGA T E1
PH AS E1
December 2002
VID 4
VID 3
VID 2
VID 1
VID 0
FB G
FB R
D IGITAL
SOF T-START
VCC
VCC DR
TO TA L
C U R R EN T
CH1
O CP
LS
CU R REN T
REA DIN G
D AC
C H 2 OC P
C H 1 OC P
32 k
3 2k
3 2k
R EMOTE
3 2k
BU FFE R
I FB
V SEN
FB
ERR OR
A MPL IF IER
CO M P
CH2
O CP
CU R REN T
REA DIN G
LS
PW M2
Vc c
Vcc
HS
LGAT E1
ISE N1
PGN DS1
PGN D
PGN DS2
ISE N2
LGAT E2
PH AS E2
U GA TE2
BO O T2
1/32
1 page  
L6919C
Table 1. Voltage Identification (VID) Codes
VID4
VID3
VID2
VID1
VID0
Output
Voltage (V)
00000
00001
00010
00011
1.550
1.525
1.500
1.475
00100
1.450
00101
1.425
00110
00111
1.400
1.375
01000
01001
1.350
1.325
01010
01011
1.300
1.275
01100
01101
01110
1.250
1.225
1.200
01111
1.175
VID4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
VID2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
VID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Output
Voltage (V)
1.150
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
0.900
0.875
0.850
0.825
0.800
Shutdown
Reference Schematic
Vin
GNDin
L1
S4
S3
S2
S1
S0
HS1
LS1
VCCDR
2
VCC
6
BOOT1
UGATE1
5
4
BOOT2
24
UGATE2
25
HS2
PHASE1
3
PHASE2
26
LGATE1
1
LGATE2
27
LS2
ISEN1
13
Rg
ISEN2
16
Rg
L6919CPGNDS1
14
PGNDS2
15
Rg PGND
28
Rg
VID4
VID3
VID2
VID1
VID0
OSC / INH
22
21
20
19
18
17
PGOOD
23
VSEN
10
FB
9
RFB
RF
SGND
7
11
FBR
8
12
FBG
COMP
CF
CIN
L2
COUT
LOAD
PGOOD
5/32
5 Page 
L6919C
The BOOTx and VCCDR pins are separated from IC's power supply (VCC pin) as well as signal ground (SGND
pin) and power ground (PGND pin) in order to maximize the switching noise immunity. The separated supply
for the different drivers gives high flexibility in mosfet choice, allowing the use of logic-level mosfet. Several com-
bination of supply can be chosen to optimize performance and efficiency of the application. Power conversion
is also flexible; 5V or 12V bus can be chosen freely.
The peak current is shown for both the upper and the lower driver of the two phases in figure 3. A 10nF capac-
itive load has been used. For the upper drivers, the source current is 1.9A while the sink current is 1.5A with
VBOOT -VPHASE = 12V; similarly, for the lower drivers, the source current is 2.4A while the sink current is 2A with
VCCDR = 12V.
CURRENT READING AND OVER CURRENT
The current flowing trough each phase is read using the voltage drop across the low side mosfets RdsON or
across a sense resistor (RSENSE) and internally converted into a current. The Tran conductance ratio is issued
by the external resistor Rg placed outside the chip between ISENx and PGNDSx pins toward the reading points.
The full differential current reading rejects noise and allows to place sensing element in different locations with-
out affecting the measurement's accuracy. The current reading circuitry reads the current during the time in
which the low-side mosfet is on (OFF Time). During this time, the reaction keeps the pin ISENx and PGNDSx
at the same voltage while during the time in which the reading circuitry is off, an internal clamp keeps these two
pins at the same voltage sinking from the ISENx pin the necessary current (Needed if low-side mosfet RdsON
sense is implemented to avoid absolute maximum rating overcome on ISENx pin).
The proprietary current reading circuit allows a very precise and high bandwidth reading for both positive and
negative current. This circuit reproduces the current flowing through the sensing element using a high speed
Track & Hold Tran conductance amplifier. In particular, it reads the current during the second half of the OFF
time reducing noise injection into the device due to the mosfet turn-on (See fig. 5). Track time must be at least
200ns to make proper reading of the delivered current
Figure 5. Current Reading Timing (Left) and Circuit (Right)
ILS1
ILS2
Total current
information
Track & Hold
LGATEX
ISENX
PGNDSX
Rg
IISENx
Rg
50µA
This circuit sources a constant 50µA current from the PGNDSx pin and keeps the pins ISENx and PGNDSx at
the same voltage. Referring to figure 4, the current that flows in the ISENx pin is then given by the following
equation:
IISENx
=
50µA + -R----S----E---N----S----E-----⋅---I-P----H----A----S---E--
Rg
=
50µ A + IINFOx
Where RSENSE is an external sense resistor or the rds,on of the low side mosfet and Rg is the transconductance
resistor used between ISENx and PGNDSx pins toward the reading points; IPHASE is the current carried by each
phase and, in particular, the current measured in the middle of the oscillator period
The current information reproduced internally is represented by the second term of the previous equation as
11/32
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet L6919CD.PDF ] | |
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