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STMicroelectronics - POWER COMBO DRIVER

Numéro de référence L6287
Description POWER COMBO DRIVER
Fabricant STMicroelectronics 
Logo STMicroelectronics 





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L6287 fiche technique
L6287
POWER COMBO DRIVER
DESCRIPTION
The F-VHS Motor Driver COMBO IC includes a
double three phase brushless motor driver plus a
DC full bridge motor driver for VCR application.
The package is SDIP42 (38+2+2 pin ground
frame).
The device is realized in BCD technology with
power LDMOS output stages.
The gate drive for high side stages is provided by
an internal charge pump with two external capaci-
tors. The first three phase motor driver is devoted
to the DRUM motor control.
The phase sequence update signal is provided in-
itially by an external start-up signal (FSTART),
whose frequency is internally divided by four,
while, during normal operation, is provided by an
optical tacho converter signal.
This signal is used as clock and reset for the state
machine.
The regulation of the speed is externally provided
by means of PWM signal generated by the µP
(DPWM), without external sensing resistor. The
feedback to the µP unit is given by a suitable
open drain output signal (PUD) synchronized by
the internal state machine.
The second three phase motor driver is devoted
to the CAPSTAN control. While the DRUM will al-
ways spin in a fixed direction, the CAPSTAN mo-
tor needs a more sophisticated logic to control the
changes in spin direction.
The motor position detection is carried out by
means of three comparators for Hall effect sen-
sors. The loop regulation for this motor is still pro-
vided by the µP with the signals CPWM and
CDIR.
The LOADING motor section include a full bridge
DC motor driver. The motor operations are di-
rectly set by the inputs LPWM, LDIR according to
the truth table reported on the page 5.
The device also includes a circuit for early ther-
mal alarm, last thermal alarm and thermal shut-
down with hysteresys. The output of this stage is
an open drain, kept ON during normal operations.
The THERM signal follows the inverted FSTART
signal between early warning and last warning
temperature, while remains in high impedance
(OFF) after lastwarning temperature and during
thermal shutdown.
SDIP42
ORDERING NUMBER: L6287
The STANDBY state of the device is imposed by
THERMAL SHUTDOWN
UNDERVOLTAGE ON VCC SUPPLY
EXTERNAL SIGNAL FSTART;
This state is imposed automatically after a de-
fined time-out.
The time-out is realized by sensing the falling
edges of the FSTART signal: if no edges are re-
corded for a time interval greater than a certain
time constant, the STANDBY condition is gener-
ated.
The time constant is defined by the external ca-
pacitor CTO.
In the STANDBY state the main functions (upper
power stages, opto decoder, etc) of the device
are turned off in order to minimize the power con-
sumption.
The device also implement a HEATER function.
The HEATER transistor is OFF during thermal
shutdown, undervoltage condition and during nor-
mal working mode.
The HEATER transistor is driven ON when the
external STANDBY condition is present according
to the following table:
FSTART
HIGH
LOW
HEATER
OFF
ON
During the ON condition, the specified heater Ron
is not guaranteed if all the voltage supplies are
not at their minimum nominal value.
February 1997
1/9
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

PagesPages 9
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