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PDF GM6535 Data sheet ( Hoja de datos )

Número de pieza GM6535
Descripción 60 MHz Universal Programmable Dual PLL Frequency synthesizer
Fabricantes Hynix Semiconductor 
Logotipo Hynix Semiconductor Logotipo



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No Preview Available ! GM6535 Hoja de datos, Descripción, Manual

GM6535
GM6535
60 MHz Universal Programmable
Dual PLL Frequency synthesizer
GENERAL DESCRIPTIONS
The GM6535 is a dual phase – locked loop
(PLL) frequency synthesizer especially designed for
CT-1 cordless phone applications worldwide. This
frequency synthesizer is also for any products with
frequency operation at 60 MHz or below.
The device features fully programmable
receive, transmit, reference, and auxiliary reference
counters accessed through an MCU serial interface,
this feature allows this device to operate in any CT-
1 cordless phone application.
The device consists of two independent phase
detectors for transmit and receive loops. A common
reference oscillator, driving two independent
reference frequency counters, provides independent
reference frequencies for transmit and receive loops.
The auxiliary reference counter allows the
user to select an additional reference frequency for
receive and transmit loops if required.
PIN CONFIGURATION
FEATURES
• Operating Voltage Range: 2.5 to 5.5 V
• Operating Temperature Range:-40 to +75¡ É
• Operating Power Consumption:[email protected]
• Maximum Operating Frequency:
60MHz@200mVp-p, VDD=2.5V
• 3 or 4 Pins Used for serial MCU Interface
• Power Saving Mode Controlled by MCU
• Lock Detect Signal
• On-Chip Reference Oscillator Supports External
Crystals to 16.0 MHz
• Reference Frequency Counter Division Range: 16 to
4095
• Auxiliary Reference Frequency Counter Division
Range: 16 to 16,383
• Transmit Counter Division Range:16 to 65,535
• Receive Counter Division Range: 16 to 65,53
CLK
AD in
D in
ENB
MCUCLK
Vss
OSCout
OSCi
1
2
3
4
5
6
7
8
16DIP
16
15
14
13
12
11
10
9
LD
Tx PDOUT
fin-T
TxPS/fTx
VDD
RxPS/fRx
RxPDo
fin-R
CLK 1
AD in 2
D in 3
ENB 4
MCUCLK 5
Vss 6
OSCout 7
OSCi 8
16 LD
15 Tx PDOUT
14 fin-T
13 TxPS/fTx
12 VDD
11 RxPS/fRx
10 RxPDo
9 fin-R
16 SOP (150Mil)
ABSOLUTE MAXIMUM RATINGS (Voltages Referenced to vss )
Symbol
Ranting
VDD
Vin
Iin , Iout
IDD , ISS
Tstg
DC Supply Voltage
Input Voltage, all Inputs
DC Current Drain Per Pin
DC Current Drain VDD or VSS Pins
Storage Temperature Range
Value
-0.5 to +6.0
-0.5 to VDD +0.5
10
30
-65 to + 150
Unit
V
V
mA
mA
¡É
1

1 page




GM6535 pdf
CLK
tsul
ENB
FIRST
CLK
LAST
CLK
thl
VDD
VSS
VDD
VSS
Figure 4.ENB High During Serial Transfer
AD in,
D in
50%
tsu th
CLK
50% FIRST
CLK
tsu
LAST
CLK
trec
ENB
50%
PREVIOUS
DATA LATCHED
VDD
VSS
VDD
VSS
VDD
VSS
Figure 5. ENB Low During Serial Transfer
GM6535
5

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GM6535 arduino
GM6535
Table 3. Global CT-1 Reference frequency Setting vs Channel Frequencies
Country
U.S.A
France
Spain
Australia
U.K
New
Zealand
Channel Frequency
46/49MHz(10,15,25 Channels)
26/41 MHz
31/41 MHz
30/39 MHz
1.7/47 MHz
1.7/34/40 MHz
fR1
5.0 KHz
6.25 KHz/12.5
KHz
5.0 KHz
5.0 KHz
6.25 KHz
6.25 KHz
fR2
-
-
-
-
1.0 KHz
1.0 KHz
REFERENCE FREQUENCY SELECTION
AND PROGRAMMING
Figure 16 shows the bit function of the reference
frequency programming word. The user can either
select the fixed reference frequency for all channels
accordingly or provide a specific reference
frequency for a particular channel by using two
reference frequency counters (e.g., for an
application in France, the base set transmit channel
common fixed reference frequency is 6.25 KHz or
12.5 KHz). (See Table 3 Figure 6 for reference
frequencies for various countries.)
However, transmit channels 6, 8, and 14 can be
set to 25 KHz, and channel 8 reference frequency
can be set to 50 KHz. But this reference frequency
may not be applied to the receiving side; therefore,
the receiving side reference frequency must be
generated by another reference frequency counter.
The higher the reference frequency, the better the
phase noise performance and faster the lock time,
but the PLL consumes more current if both
reference frequency counters are in operation. In
general, the 12-bit reference frequency counter plus
the ÷ 4 and ÷ 25 module can offer all the reference
frequencies for global CT-1 transmit and receive
channel requirements. Users can select their own
reference frequency by introducing the additional
14-bit auxiliary reference frequency counter.
Again, the 14-bit auxiliary reference frequency
counter can be shut down by the auxiliary reference
enable bit in the reference counter programming
word by setting the bit to 0. At this state, the fR2 is
automatically connected to point C (the ÷ 25 block
output), and fR1 cha be connected to point A or B by
setting the fR1-S1 and fR1-S2 bits in the reference
counter program word. The 14-bit auxiliary
reference frequency counter data will be in Don’t
Care state.
If the 14-bit auxiliary reference frequency counter
is enabled (auxiliary reference enable = 1), the fR2 is
automatically connected to point D (14-bit counter
output), and fR1 can be selected to connect to point
A,B, or C, depending on the bit setting of fR1-S1 and
fR1-S2.
Table 4 and Figure 16 describe the functions of
the auxiliary reference enable bit and the fR1-S1 and
fR1-S2 bits selection.
Table 4. Bit Function and the Reference Frequency Selection Bit Setting of the
Reference Frequency Counter Programming Word
N/A Not Applicable
AUX REF
Enable
Auxiliary Reference Frequency
Counter Mode
Module
Select
fR1
S1
fR1
S2
fR1
Routin
g
14-Bit Auxiliary Reference Frequency fR2C 0 0 N/A
0 Counter Disable
0 1 fR1A
1 0 fR1B
1 1 N/A
14-Bit Auxiliary Reference Frequency fR2D 0 0 N/A
Counter Disable
1
0 1 fR1A
1 0 fR1B
1 1 fR1C
11

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