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PDF CCD595 Data sheet ( Hoja de datos )

Número de pieza CCD595
Descripción 9216 x 9216 Pixel Image Area Full Frame CCD Image Sensor
Fabricantes Fairchild Imaging 
Logotipo Fairchild Imaging Logotipo



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PRELIMINARY DATA SHEET
CCD595
9216 x 9216 Pixel Image Area
Full Frame CCD Image Sensor
FEATURES
9216 x 9216 Full Frame CCD Array
8.75 µm x 8.75 µm Pixels
80.64mm x 80.64mm Image Area
100% Fill Factor
Non Multi-Pinned Phase (MPP) Operation
8 Outputs (4 on each side)
Readout Noise Less Than 30 e- at 100MHz (25MHz x 4)
GENERAL DESCRIPTION
The CCD595 is a 9216 x 9216 active element solid state Charge
Coupled Device (CCD) Full Frame sensor. The CCD is intended for
advanced scientific, space, and aerial reconnaissance applications. The
CCD595 is organized as an array of 9216 horizontal by 9216 vertical
imaging elements. The pixel pitch is 8.75µm with a 100% fill factor.
Three-phase clocking is employed in the imaging area with two-phase
clocking in the serial readout registers. Image readout is performed via 4
serial registers containing 19 isolation rows between imaging and
readout sections. The imaging array can be clocked unidirectional (4-
output configuration) or bi-directional (8-output configuration). The
imaging area segments are split in mid-array for the latter configuration.
To maximize the exposure/readout cycle rate, concurrent array and
serial register clocking is utilized. Fast transfer clocking between the
array and serial registers is accomplished with strapped transfer gates
that load each line in less than 5 microseconds.
The output circuit architecture features eight (four active, eight optional)
three stage source follower readouts. The nominal read noise of the
output amplifiers is less than 25 electrons at 25MHz. The combined data
rates for 4 and 8 output configurations are 100MHz and 200MHz
respectively. Internal temperature and humidity sensors are also located
near the FPA for external monitoring.
The top of the package has an optical window over the CCD active
area. The CCD595 is mounted in an environmentally sealed
enclosure containing the CCD array with thermoelectric coolers for
controlling the operating temperature of the array.
Pinouts are provided on three sides for electrical connections (4-
output configuration). The package base serves as the heat sink
interface for thermal management. A mounting flange at the
package rim is used as a Z-axis reference datum for the
planarization of the CCD focal plane with external optics.
DC OPERATING CHARACTERISTICS
SYMBOL PARAMETER
VDD DC Supply Voltage
VRD Reset Drain Voltage
VOG Output Gate Voltage
VSS Substrate Ground
Vodc Output DC Level
Z Suggested Load Resistor
MIN
18.0
14.0
0.0
VRD-5
0.8
RANGE
NOM
20.0
17.0
1.0
0.0
1.0
MAX
23.0
20.0
5.0
VRD-4
1.8
UNIT
V
V
V
V
V
K ohms
REMARKS
TYPICAL CLOCK VOLTAGES
SYMBOL PARAMETER
HIGH
LOW
VφH(1,2),
φSG
VφV (1,2,3)
VφR
VφVTG (2,3)
CφV(1,2,3)
CφVTG2,3
Horizontal Transport Clock Voh Max-Min
Vertical Transport Clocks
Reset Gate Clock
Array Transfer Gate Clock
Vertical Array Gates
Cap. (per φV)
Array Transfer Gate
Cap. (per pin)
A1
A2
A3
TG2
TG3
+7.5
+10
+8.0
+15.0
+8.0
47
86
109
200
200
-7.5
-10.0
0.0
-10.0
30
38
31
150
150
CφH (1,2)
CφH
Horizontal Transfer Gate
Cap. (per φ H)
Horizontal Transfer Gate
Cap. (per pin)
S1 65
S2 76
S1 65
S2 76
Note 1: φH = 400 pF, φV = 60,000 pF. All clock rise and fall times should be > 10 ns.
UNIT
V
V
V
V
V
nF
pF
pF
pF
REMARKS
+4.5, -0.5 Typical
+5, -10 V Typical
+2.0 +8.0 V Typical
+5, -10 Typical
Min @ +10V
Max @ -10V
Min @ +10V
Max @ -10V
Min @ +10V
Max @ -10V
Min @ +10V
Max @ -10V
Fairchild Imaging, Inc., 1801 McCarthy Blvd, Milpitas 95035, (800) 325-6975, (408) 433-2500

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