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PDF T550HVD02.5 Data sheet ( Hoja de datos )
| Número de pieza | T550HVD02.5 | |
| Descripción | TFT LCD Module | |
| Fabricantes | AUO | |
| Logotipo |  |
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T550HVD02.5 Product Specification
Rev 1.0
Model Name: T550HVD02.5
Issue Date: 2013/01/10
(…)Preliminary Specifications
(＊)Final Specifications
Customer Signature
Date AUO
Date
Approved By
_________________________________
Approval By PM Director
CP Wang
____________________________________
Note
Reviewed By RD Director
Eugene CC Chen
____________________________________
Reviewed By Project Leader
Yi Tse Lin
____________________________________
Prepared By PM
Haley Huang
____________________________________
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 1 / 31
1 page  
2. Absolute Maximum Ratings
T550HVD02.5 Product Specification
Rev 1.0
The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit
Item
Logic/LCD Drive Voltage
Input Voltage of Signal
Operating Temperature
Operating Humidity
Storage Temperature
Storage Humidity
Panel Surface Temperature
Electro Statistic Voltage
Symbol
Vcc
Vin
TOP
HOP
TST
HST
PST
ESD
Min
-0.3
-0.3
0
10
-20
10
Max
14
4
+50
90
+60
90
65
±2
Unit
[Volt]
[Volt]
[oC]
[%RH]
[oC]
[%RH]
[oC]
[KV]
Conditions
Note 1
Note 1
Note 2
Note 2
Note 2
Note 2
Note 3
Note 4
Note 1: Duration: 50 msec.
℃Note 2 : Maximum Wet-Bulb should be 39 and No condensation.
℃The relative humidity must not exceed 90% non-condensing at temperatures of 40
℃ ℃greater than 40 , the wet bulb temperature must not exceed 39 .
or less. At temperatures
Note 3: Surface temperature is measured at 50℃ Dry condition
Note 4: ESD protection procedure must be applied during production process; especially polarizer protection films
remove process. Please directly contact AUO if module process advice is required.
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 5 / 31
5 Page 
3.2 Interface Connections
3.2.1 T-CON BOARD PIN MAP
LCD connector : 187059-51221-1 (P-TWO, LVDS connector)
T550HVD02.5 Product Specification
Rev.1.0
PIN Symbol
Description
PIN
1
N.C.
No connection (for AUO test only. Do not
connect)
26
2 SCL
EEPROM Serial Clock
27
3 WP
EEPROM Write Protection
High(3.3V) for Writable,
Low(GND) for Protection
28
4 SDA
EEPROM Serial Data
29
5
N.C.
No connection (for AUO test only. Do not
connect)
30
Panel Rotation Display Control
6 ROTATE. High(3.3V) : Rotate Enable(Data mirror) 31
Open/Low(GND) : Rotate Disable
Symbol
N.C.
N.C.
CH2_0-
CH2_0+
CH2_1-
CH2_1+
Description
No connection (for AUO test only. Do
not connect)
No connection (for AUO test only. Do
not connect)
LVDS Channel 2, Signal 0-
LVDS Channel 2, Signal 0+
LVDS Channel 2, Signal 1-
LVDS Channel 2, Signal 1+
7 LVDS_SEL
Open/High(3.3V) for NS,
Low(GND) for JEIDA
32
8
N.C.
No connection (for AUO test only. Do not
connect)
33
9
N.C.
No connection (for AUO test only. Do not
connect)
34
CH2_2-
CH2_2+
GND
LVDS Channel 2, Signal 2-
LVDS Channel 2, Signal 2+
Ground
3D Function Enable
10 3D_EN
High(3.3V) : 3D
35 CH2_CLK-
LVDS Channel 2, Clock -
Open/Low(GND) : 2D
11 GND
Ground
36 CH2_CLK+
LVDS Channel 2, Clock +
12 CH1_0-
LVDS Channel 1, Signal 0-
37 GND
Ground
13 CH1_0+
LVDS Channel 1, Signal 0+
38 CH2_3-
LVDS Channel 2, Signal 3-
14 CH1_1-
15 CH1_1+
16 CH1_2-
17 CH1_2+
LVDS Channel 1, Signal 1-
LVDS Channel 1, Signal 1+
LVDS Channel 1, Signal 2-
LVDS Channel 1, Signal 2+
39 CH2_3+
LVDS Channel 2, Signal 3+
40
CH2_4-
LVDS Channel 2,Signal 4-(for 10bit
input)
41
CH2_4+
LVDS Channel 2,Signal 4+(for 10bit
input)
42
N.C.
No connection (for AUO test only. Do
not connect)
18 GND
Ground
No connection (for AUO test only. Do
43 N.C.
not connect)
19 CH1_CLK-
LVDS Channel 1, Clock -
44 GND
Ground
20 CH1_CLK+
LVDS Channel 1, Clock +
45 GND
Ground
21 GND
22 CH1_3-
Ground
LVDS Channel 1, Signal 3-
46 GND
Ground
47
N.C.
No connection (for AUO test only. Do
not connect)
23 CH1_3+
LVDS Channel 1, Signal 3+
48 VDD Power Supply, +12V DC Regulated
24
CH1_4-
LVDS Channel 1,Signal 4-(for 10bit
input)
49 VDD Power Supply, +12V DC Regulated
25
CH1_4+
LVDS Channel 1,Signal 4+(for 10bit
input)
50
VDD
Power Supply, +12V DC Regulated
51 VDD Power Supply, +12V DC Regulated
Note: N.C. : please leave this pin unoccupied. It can not be connected by any signal
(Low/GND/High). Note: Open / High(3.3V) / Low(GND)/ WP / SDA / SCL described in 3.2.1.3
Note: 3D_EN timing described in 3.2.1.3
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 11 / 31
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