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PDF FQPF16N25C Data sheet ( Hoja de datos )

Número de pieza FQPF16N25C
Descripción N-Channel QFET MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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FQPF16N25C
N-Channel QFET® MOSFET
250 V, 15.6 A, 270 mΩ
Features
• 15.6 A, 250 V, RDS(on) = 270 m(Max) @ VGS = 10 V,
ID = 7.8 A
• Low Gate Charge (Typ. 41 nC)
• Low Crss (Typ. 68 pF)
• 100% Avalanche Tested
November 2013
Description
This N-Channel enhancement mode power MOSFET is pro-
duced using Fairchild Semiconductor’s proprietary planar stripe
and DMOS technology. This advanced MOSFET technology
has been especially tailored to reduce on-state resistance, and
to provide superior switching performance and high avalanche
energy strength. These devices are suitable for switched mode
power supplies, active power factor correction (PFC), and elec-
tronic lamp ballasts.
D
GDS
TO-220F
G
MOSFET Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain to Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25oC)
- Continuous (TC = 100oC)
- Pulsed
Gate to Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(TC = 25oC)
- Derate Above 25oC
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering,
1/8” from Case for 5 Seconds
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
*Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction to Case, Max
Thermal Resistance, Junction to Ambient, Max
S
FQPF16N25C
250
15.6 *
9.8 *
62.4 *
± 30
410
15.6
13.9
5.5
43
0.34
-55 to +150
300
FQPF16N25C
2.89
62.5
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Unit
°C/W
°C/W
©2004 Fairchild Semiconductor Corporation
FQPF16N25C Rev. C1
1
www.fairchildsemi.com

1 page




FQPF16N25C pdf
Same Type
50KΩ as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
IG = co3nmsAt.
DUT
Charge
Figure 12. Gate Charge Test Circuit & Waveform
V10GVS
VDS
VGS
RG
RL
VDD
VDS
90%
DUT
VGS 10%
td(on)
tr
t on
Figure 13. Resistive Switching Test Circuit & Waveforms
td(off)
tf
t off
V1G0GVSS
tp
VDS
ID
RG
L
EAS = --21-- L IAS2
------B--V--D--S-S-------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
DUT
VDD
VDS (t)
t p Time
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2004 Fairchild Semiconductor Corporation
FQPF16N25C Rev. C1
5
www.fairchildsemi.com

5 Page










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