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Número de pieza | IRF840LCS | |
Descripción | Power MOSFET ( Transistor ) | |
Fabricantes | Vishay | |
Logotipo | ![]() |
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IRF840LCS, IRF840LCL, SiHF840LCS, SiHF840LCL
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
Qg (Max.) (nC)
500
VGS = 10 V
39
Qgs (nC)
10
Qgd (nC)
19
Configuration
Single
0.85
I2PAK (TO-262)
D2PAK (TO-263)
D
G
DS
G
D
S
G
S
N-Channel MOSFET
FEATURES
• Halogen-free According to IEC 61249-2-21
Definition
• Ultra Low Gate Charge
• Reduced Gate Drive Requirement
• Enhanced 30 V VGS Rating
• Reduced Ciss, Coss, Crss
• Extremely High Frequency Operation
• Repetitive Avalanche Rated
• Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
This new series of low charge Power MOSFETs achieve
significantly lower gate charge then conventional Power
MOSFETs. Utilizing the new LCDMOS (low charge device
Power MOSFETs) technology, the device improvements are
achieved without added product cost, allowing for reduced
gate drive requirements and total system savings. In
addition, reduced switching losses and improved efficiency
are achievable in a variety of high frequency applications.
Frequencies of a few MHz at high current are possible using
the new low charge Power MOSFETs.
These device improvements combined with the proven
ruggedness and reliability that characterize Power
MOSFETs offer the designer a new power transistor
standard for switching applications.
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
Note
a. See device orientation.
D2PAK (TO-263)
SiHF840LCS-GE3
IRF840LCSPbF
SiHF840LCS-E3
I2PAK (TO-262)
SiHF840LCL-GE3
IRF840LCLPbF
SiHF840LCL-E3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Currenta, e
VGS at 10 V
TC = 25 °C
TC = 100 °C
Linear Derating Factor
Single Pulse Avalanche Energyb, e
Avalanche Currenta
Repetiitive Avalanche Energya
Maximum Power Dissipation
Peak Diode Recovery dV/dtc, e
TC = 25 °C
TA = 25 °C
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
VDS
VGS
ID
IDM
EAS
IAR
EAR
PD
dV/dt
TJ, Tstg
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 14 mH, Rg = 25 , IAS = 8.0 A (see fig. 12).
c. ISD 8.0 A, dI/dt 100 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
e. Uses IRF840LC, SiHF840LC data and test conditions.
LIMIT
500
± 30
8.0
5.1
28
1.0
510
8.0
13
125
3.1
3.5
- 55 to + 150
300d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91068
S11-1050-Rev. C, 30-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
1 page ![]() ![]() IRF840LCS, IRF840LCL, SiHF840LCS, SiHF840LCL
Vishay Siliconix
8.0
6.0
4.0
2.0
0.0
25
91068_09
50 75 100 125
TC, Case Temperature (°C)
150
Fig. 9 - Maximum Drain Current vs. Case Temperature
10
VDS
VGS
Rg
RD
D.U.T.
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
+- VDD
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on) tr
td(off) tf
Fig. 10b - Switching Time Waveforms
1
D = 0.5
0.2
0.1 0.1
0.05
0.02
0.01
10-2
10-5
91068_11
Single Pulse
(Thermal Response)
10-4
10-3
10-2
0.1
t1, Rectangular Pulse Duration (s)
PDM
t1
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
1 10
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91068
S11-1050-Rev. C, 30-May-11
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
5 Page ![]() |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet IRF840LCS.PDF ] |
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