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PDF 74HCT4051-Q100 Data sheet ( Hoja de datos )
| Número de pieza | 74HCT4051-Q100 | |
| Descripción | 8-channel analog multiplexer/demultiplexer | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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74HC4051-Q100; 74HCT4051-Q100
8-channel analog multiplexer/demultiplexer
Rev. 2 — 8 October 2012
Product data sheet
1. General description
The 74HC4051-Q100; 74HCT4051-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance
with JEDEC standard no. 7A.
The 74HC4051-Q100; 74HCT4051-Q100 is an 8-channel analog
multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable
input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z).
With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2.
With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2.
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).
The VCC to GND ranges are 2.0 V to 10.0 V for 74HC4051-Q100 and 4.5 V to 5.5 V for
74HCT4051-Q100. The analog inputs/outputs (Y0 to Y7, and Z) can swing between VCC
as a positive limit and VEE as a negative limit. VCC VEE may not exceed 10.0 V. For
operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Wide analog input voltage range from 5 V to +5 V
Low ON resistance:
80 (typical) at VCC VEE = 4.5 V
70 (typical) at VCC VEE = 6.0 V
60 (typical) at VCC VEE = 9.0 V
Logic level translation: to enable 5 V logic to communicate with 5 V analog signals
Typical ‘break before make’ built-in
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )
CDM AEC-Q100-011 revision B exceeds 1000 V
Multiple package options
1 page  
NXP Semiconductors
74HC4051-Q100; 74HCT4051-Q100
8-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
74HC4051-Q100
74HCT4051-Q100
Y4 1
Y6 2
Z3
Y7 4
Y5 5
E6
VEE 7
GND 8
16 VCC
15 Y2
14 Y1
13 Y0
12 Y3
11 S0
10 S1
9 S2
aaa-003160
Fig 5. Pin configuration SO16 and TSSOP16
74HC4051-Q100
74HCT4051-Q100
terminal 1
index area
Y6 2
Z3
Y7 4
Y5 5
E6
VEE 7
VCC(1)
15 Y2
14 Y1
13 Y0
12 Y3
11 S0
10 S1
aaa-003161
Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to VCC.
Fig 6. Pin configuration DHVQFN16
6.2 Pin description
Table 2. Pin description
Symbol
Pin Description
E 6 enable input (active LOW)
VEE
GND
7 supply voltage
8 ground supply voltage
S0, S1, S2
11, 10, 9
select input
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 13, 14, 15, 12, 1, 5, 2, 4 independent input or output
Z 3 common output or input
VCC 16 supply voltage
74HC_HCT4051_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 8 October 2012
© NXP B.V. 2012. All rights reserved.
5 of 31
5 Page 
NXP Semiconductors
74HC4051-Q100; 74HCT4051-Q100
8-channel analog multiplexer/demultiplexer
Table 7. Static characteristics for 74HC4051-Q100 …continued
Voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
Vos is the output voltage at pins Z or Yn, whichever is assigned as an output.
Symbol Parameter
Conditions
ICC supply current
VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC;
Vos = VCC or VEE
VCC = 6.0 V
VCC = 10.0 V
CI input capacitance
Csw
switch capacitance
independent pins Yn
common pins Z
Tamb = 40 C to +85 C
VIH HIGH-level input
voltage
VIL LOW-level input
voltage
II input leakage current
IS(OFF)
OFF-state leakage
current
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VEE = 0 V; VI = VCC or GND
VCC = 6.0 V
VCC = 10.0 V
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
VSW = VCC VEE; see Figure 11
per channel
all channels
IS(ON)
ICC
ON-state leakage
current
supply current
Tamb = 40 C to +125 C
VIH HIGH-level input
voltage
VIL LOW-level input
voltage
VI = VIH or VIL; VSW = VCC VEE;
VCC = 10.0 V; VEE = 0 V; see Figure 12
VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC;
Vos = VCC or VEE
VCC = 6.0 V
VCC = 10.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
Min Typ Max
Unit
- - 8.0 A
- - 16.0 A
- 3.5 -
pF
- 5-
pF
- 25 -
pF
1.5 -
3.15 -
4.2 -
6.3 -
--
--
--
--
-V
-V
-V
-V
0.5 V
1.35 V
1.8 V
2.7 V
- - 1.0 A
- - 2.0 A
- - 1.0 A
- - 4.0 A
- - 4.0 A
--
--
1.5 -
3.15 -
4.2 -
6.3 -
--
--
--
--
80.0
160.0
A
A
-V
-V
-V
-V
0.5 V
1.35 V
1.8 V
2.7 V
74HC_HCT4051_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 8 October 2012
© NXP B.V. 2012. All rights reserved.
11 of 31
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