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PDF ACPM-920502-TR1 Data sheet ( Hoja de datos )

Número de pieza ACPM-920502-TR1
Descripción 3x4 CDMA (BC0/BC10 & BC1) CDMA Dual-Band Power Amplifier Module
Fabricantes AVAGO 
Logotipo AVAGO Logotipo



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ACPM-920502-TR1
3x4 CDMA (BC0/BC10 & BC1) CDMA Dual-Band Power
Amplifier Module with Integrated Coupler
Preliminary Data Sheet
Description
The ACPM-920502 is the CDMA dual-band power amplifier
module with integrated directional couplers designed for CDMA
(3GPP2 BC0/BC10 & BC1) handsets as well as the wireless data
card applications. It is designed to meet the stringent linearity
requirements of the 3GPP and 3GPP2 standards including the
cdma2000, 1xEV-DO Rev.0 and Rev.A while keeping excellent
PAE over the entire power range by supporting 2 power modes
(low and high power modes). This PA has low quiescent current
and high PAE in both power modes. So the average power
consumption is minimized to enhance the talk time.
The ACPM-920502 contains integrated directional couplers, 50
input and output matching networks, RF input & output DC blocking
capacitors as well as the Vcc decoupling/bypass capacitors,. All
these functions are integrated in a 16-pin surface-mount leadless
package of 3x4 mm form factor and 0.9 mm thickness, so it can
minimize the number of external components.
The integrated LB & HB directional couplers are daisy-chained
internally. One coupler input port and one coupler output port are
shared by the both bands.
Features
CDMA dual-band PA supporting CDMA (BC0 / BC10, BC1)
2-mode power/gain control (low power and high power modes)
Integrated daisy-chained LB & HB directional couplers
High directivity (small coupled power or delivered power
variation into mismatched load)
Excellent PAE in low and mid power ranges.
Low quiescent current in low power mode
Excellent average power consumption and talk-time
Spectral linearity supporting IS-95, cdma2k, 1xEV-DO Rev.0
& Rev.A
Internally matched 50RF input & output ports
Internal RF input & output DC blocking capacitors
Internal Vcc1 & Vcc2 bypass capacitors
Internal Vref eliminating external LDO regulators and switches
1.8V CMOS compatible control logics (VH=1.35V~3.1V)
3x4x0.9mm 16-pad leadless surface-mount package
Lead-free, RoHS compliant, Halogen-free, Sb-free, Green
Applications
CDMA (BC0 / BC10 & BC1) dual -band handsets, Wireless
USB data card dongles and embedded data cards.
The ACPM-920502 has integrated on-chip Vref and on-module
bias switch, so the external LDO regulators and switches for
external Vref are not required. It also makes the PA fully digital-
controllable by the baseband chipset. The Ven pin turns the PA on
and off by the digital control signal. All of the digital control input
pins such as the Ven and Vmode are fully CMOS compatible down
to the 1.8V logic.
Ordering Information
Part Number
ACPM-920502-TR1
Number of
Devices
1000
Container
Tape & Reel (7”)
The ACPM-920502 is manufactured on an advanced InGaP/GaAs
HBT technology that provides excellent performance, temperature
stability, ruggedness, and reliability.
This preliminary data is provided to assist you in the evaluation of product(s) currently under development. Until
Avago Technologies releases this product for general sales, Avago Technologies reserves the right to alter prices, specifications, features,
capabilities, functions, release dates, and remove availability of the product(s) at anytime.
1 Confidential

1 page




ACPM-920502-TR1 pdf
Foot Print
All dimensions are in mm
X-Ray Top View through Package
Pin Descriptions
Pin # Name
1 Vcc1
2 RFin_HB
3 RFin_LB
4 Ven_HB
5 Ven_LB
6 Vmode
7 Gnd
8 Cpl_out
9 Gnd
10 RFout_LB
11 Gnd
12 Vcc2
13 Gnd
14 RFout_HB
15 Cpl_in
16 Gnd
Description
Supply Voltage 1
High Band RF Input
Low Band RF Input
High Band PA Enable
Low Band PA Enable
Mode Control
Ground
Coupled Out
Ground
Low Band RF Output
Ground
Supply Voltage 2
Ground
High Band RF Output
Coupled In
Ground
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ACPM-920502-TR1 arduino
Handling and Storage
ESD (Electrostatic Discharge)
Electrostatic discharge occurs naturally in the environment. With
the increase in voltage potential, the outlet of neutralization or
discharge will be sought. If the acquired discharge route is
through a semiconductor device, destructive damage will result.
ESD countermeasure methods should be developed and used to
control potential ESD damage during handling in a factory
environment at each manufacturing site.
MSL (Moisture Sensitivity Level)
Plastic encapsulated surface mount package is sensitive to
damage induced by absorbed moisture and temperature.
Avago Technologies follows JEDEC Standard J-STD 020B. Each
component and package type is classified for moisture sensitivity
by soaking a known dry package at various temperatures and
relative humidity, and times. After soak, the components are
subjected to three consecutive simulated reflows.
The out of bag exposure time maximum limits are determined by
the classification test describe below which corresponds to a MSL
classification level 6 to 1 according to the JEDEC standard
IPC/JEDEC J-STD-020B and J-STD-033.
The ACPM-920502 is MSL3. Thus, according to the J-STD-033
p.11 the maximum Manufacturers Exposure Time (MET) for this
part is 168 hours. After this time period, the part would need to be
removed from the reel, de-taped and then re-baked. MSL
classification reflow temperature for the ACPM-920502 is
targeted at 260+0/-5. Figure and table on next page show
typical SMT profile for maximum temperature of 260 +0/-5.
Moisture Classification Level and Floor Life
MSL Level
Floor Life (out of bag) at factory ambient =< 30oC/60% RH or as stated
1 Unlimited at =< 30oC/85% RH
2 1 year
2a 4 weeks
3 168 hours
4 72 hours
5 48 hours
5a 24 hours
6 Mandatory bake before use. After bake, must be reflowed within the time limit specified on the label
Note :
1. The MSL Level is marked on the MSL Label on each shipping bag.
11 Confidential

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