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Número de pieza | JN5142-J01 | |
Descripción | JenNet-IP Wireless Microcontroller | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de JN5142-J01 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! Data Sheet: JN5142-J01
JenNet-IP Wireless Microcontroller
Overview
The JN5142-J01 is an ultra low power, high performance wireless
microcontroller suitable for use in JenNet-IP Smart Devices. The JN5142
features an enhanced 32-bit RISC processor offering high coding efficiency
through variable width instructions, a multi-stage instruction pipeline and low
power operation with programmable clock speeds. It also includes a 2.4GHz
IEEE802.15.4 compliant transceiver, 128KB of ROM, 32KB of RAM, and a
comprehensive mix of analogue and digital peripherals. The JenNet-IP
network stack is embedded in the device ROM. The operating current is
below 18mA, allowing operation direct from a coin cell.
The peripherals support a wide range of applications. They include a 2-wire
serial interface, which operates as either master or slave, a two channel
ADC with battery and temperature sensors. A large switch matrix of up to 81
elements can be supported for remote control applications. The best in
class radio current and a 0.6µA sleep timer give excellent battery life.
Block Diagram
XTAL
22R..4a4zGdGiHHoz
Power
Management
Watchdog
Timer
Voltage Supply
Monitor
O-QPSK
Modem
IEEE802.15.4
MAC
Accelerator
RAM ROM
32KB 128KB
32-bit
RISC CPU
29-byte
OTP eFuse
128-bit AES
Encryption
Accelerator
SPI
2-Wire Serial
(Master)
Timer
UART
2-Wire Serial
(Slave)
Sleep Counter
4-Chan 8-bit
ADC
Battery and,
Temp Sensors
Benefits
• Single chip optimized for
simple applications
• Very low current solution for
long battery life – over 10 yrs
• JenNet-IP Smart Devices
• Highly featured 32-bit RISC
CPU for high performance
and low power
• System BOM is low in
component count and cost
• Flexible sensor interfacing
options
Applications
• Robust and secure low power
wireless applications using
JenNet-IP
• Smart devices, for example
Thermostats, Motion sensors
etc
• Lighting Control
• Lamps
• Wall switches
• Active RFID tags
• Energy harvesting, for example
self powered light switch
Features: Transceiver
• 2.4GHz IEEE802.15.4 compliant
• 128-bit AES security processor
• MAC accelerator with packet
formatting, CRCs, address check,
auto-acks, timers
• Integrated ultra low power sleep
oscillator – 0.6µA
• 2.0V to 3.6V battery operation
• Deep sleep current 0.12µA
(Wake-up from IO)
• 0.7µA sleep with timer (1.4uA with
RAM held)
• <$0.50 external component cost
• Rx current 16.5mA
• Tx current 14.8mA
• Receiver sensitivity -95dBm
• Transmit power 2.5dBm
Features: Microcontroller
• 32-bit RISC CPU, 1 to 32MHz
clock speed
• Low power operation
• Variable instruction width for high
coding efficiency
• Multi-stage instruction pipeline
• 128KB ROM and 32KB RAM for
bootloaded program codeJenNet-
IP stack in ROM
• Master/Slave I2C 2-wire interface
• 3xPWM and Application
timer/counter
• 2 low power pulse counters
• UART
• SPI port with 3 selects
• Supply Voltage Monitor with 8
programmable thresholds
• 2- to 4-input 8-bit ADC,
comparator
• Battery and temperature sensors
• Watchdog timer and Power-on-
Reset (with brown-out) circuit
• Up to 18 DIO
Industrial temp -40°C to +125°C
6x6mm 40-lead Punched QFN
Lead-free and RoHS compliant
© NXP Laboratories UK 2012
JN-DS-JN5142-J01-J01 1v1
1
1 page B.4.1 Schematic Diagram
B.4.2 PCB Design and Reflow Profile
B.4.3 Moisture Sensitivity Level (MSL)
Related Documents
RoHS Compliance
Status Information
Disclaimers
Trademarks
Version Control
Contact Details
88
90
90
91
91
91
92
92
92
93
© NXP Laboratories UK 2012
JN-DS-JN5142-J01-J01 1v1
5
5 Page Digital Peripheral I/O
Primary
Alternate Functions
33
DIO10
TIM0OUT 32KXTALOUT
CMOS DIO10, Timer0 PWM Output or
32K External Crystal Output
34
DIO11
PWM1
CMOS DIO11 or PWM1 Output
36
DIO12
PWM2
CTS0
ADO
CMOS
DIO12, PWM2 Output, UART 0
Clear To Send Input or
Antenna Diversity Odd
37
DIO13
PWM3
RTS0
ADE
CMOS
DIO13, PWM3 Output, UART 0
Request To Send Output or
Antenna Diversity Even
38
DIO14
SIF_CLK
TXD0
SPISEL1
CMOS
DIO14, Serial Interface Clock,
UART 0 Transmit Data Output
or SPI Slave Select Output 1
40
DIO15
SIF_D
RXD0
SPISEL2
CMOS
DIO15, Serial Interface Data,
UART 0 Receive Data Input or
SPI Slave Select Output 2
1
DIO16
COMP1P
SIF_CLK
CMOS DIO16, Comparator Positive
Input or Serial Interface clock
2
DIO17
COMP1M
SIF_D
CMOS DIO17, Comparator Negative
Input or Serial Interface Data
The PCB schematic and layout rules detailed in Appendix B.4
must be followed. Failure to do so will likely result in the
JN5142 failing to meet the performance specification detailed
herein and worst case may result in device not functioning in
the end application.
© NXP Laboratories UK 2012
JN-DS-JN5142-J01-J01 1v1
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet JN5142-J01.PDF ] |
Número de pieza | Descripción | Fabricantes |
JN5142-J01 | JenNet-IP Wireless Microcontroller | NXP Semiconductors |
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