HCF4027B Datasheet PDF - STMicroelectronics
| Part Number | HCF4027B | |
| Description | DUAL-J-K MASTER-SLAVE FLIP-FLOP | |
| Manufacturers | STMicroelectronics | |
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HCC/HCF4027B
DUAL-J-K MASTER-SLAVE FLIP-FLOP
.. SET-RESET CAPABILITY
STATIC FLIP-FLOP OPERATION - RETAINS
STATE INDEFINITELY WITH CLOCK LEVEL
EITHER ”HIGH” OR ”LOW”
. MEDIUM SPEED OPERATION - 16MHz (typ.
clock toggle rate at 10V)
. STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
. QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
. INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
. 100% TESTED FOR QUIESCENT CURRENT
. MEETS ALL REQUIREMENTS OF JEDECTEN-
TATIVE STANDARD N0. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”.
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC4027BF HCF4027BM1
HCF4027BEY HCF4027BC1
DESCRIPTION
The HCC4027B (extended temperature range) and
HCF4027B (intermediate temperature range) are
monolithic integrated circuit, available in 16-lead
dual in-line plastic or ceramic package and plastic
micro package.
The HCC/HCF4027B is a single monolithic chip in-
tegrated circuit containing two identical complemen-
tary-symmetry J-K master-slave flip-flops. Each
flip-flop has provisions for individual J, K, Set, Reset,
and Clock input signals, Buffered Q and Q signals
are provided as outputs. This input-output arrange-
ment provides for compatible operation with the
HCC/HCF4013B dual D-type flip-flop.
The HCC/HCF4027B is useful in performing control,
register, and toggle functions. Logic levels present
at the J and K inputs along with internal self-steering
control the state of each flip-flop ; changes in the flip-
flop state are synchronous with the positive-going
transition of the clock pulse. Set and reset functions
are independent of the clock and are initiated when
a high level signal is present at either the Set or
Reset input.
June 1989
PIN CONNECTIONS
1/12
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HCC/HCF4027B
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200kΩ,
typical temperature coefficient for all VDD = 0.3%/°C values, all input rise and fall time = 20ns)
Symbol
Parameter
tPLH, tPHL Propagation
Delay Time
Clock to Q or Q
Outputs
Test Conditions
Value
VDD (V) Min. Typ. Max.
5 150 300
10 65 130
15 45 90
tPLH Propagation
Delay Time
Set to Q or Reset
to Q
5 150 300
10 65 130
15 45 90
tPHL Propagation
Delay Time
Set to Q or Reset
to Q
tTHL, tTLH Transition Time
tW Pulse Width
Clock
5 200 400
10 85 170
15 60 120
5 100 200
10 50 100
15 40 80
5 140 70
10 60 30
15 40 20
tW Pulse Width
Set or Reset
tr,tf Clock Input Rise
or Fall Time
tsetup Setup Time
Data
fmax Maximum
Clock Input
Frequency *
* Input tr, tf = 5ns.
Toggle Mode
5 180 90
10 80 40
15 50 25
5 15
10 4
15 1
5 200 100
10 75 35
15 50 25
5 3.5 7
10 8 16
15 12 24
Unit
ns
ns
ns
ns
µs
ns
MHz
5/12
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for HCF4027B electronic component. |
| Information | Total 12 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ HCF4027B.PDF Datasheet ] | |
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