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PDF FQN1N60C Data sheet ( Hoja de datos )
| Número de pieza | FQN1N60C | |
| Descripción | N-Channel QFET MOSFET | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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FQN1N60C
N-Channel QFET® MOSFET
600 V, 0.30 A, 11.5 Ω
Description
This N-Channel enhancement mode power MOSFET is produced
using Fairchild Semiconductor’s proprietary planar stripe and
DMOS technology. This advanced MOSFET technology has
been especially tailored to reduce on-state resistance, and to
provide superior switching performance and high avalanche
energy strength. These devices are suitable for switched mode
power supplies, active power factor correction (PFC), and
electronic lamp ballasts.
December 2013
Features
• 0.30 A, 600 V, RDS(on) = 11.5 Ω (Max.) @ VGS = 10 V, ID = 0.15 A
• Low Gate Charge (Typ. 4.8 nC)
• Low Crss (Typ. 3.5 pF)
• 100% Avalanche Tested
D
GDS
TO-92
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
Symbol
Parameter
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
PD Power Dissipation (TA = 25°C)
Power Dissipation (TL = 25°C)
- Derate above 25°C
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering,
1/8" from Case for 5 Seconds.
Thermal Characteristics
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Symbol
RθJL
RθJA
Parameter
Thermal Resistance, Junction-to-Lead, Max.
Thermal Resistance, Junction-to-Ambient, Max.
(Note 5a)
(Note 5b)
FQN1N60CTA
600
0.3
0.18
1.2
± 30
33
0.3
0.3
4.5
1
3
0.02
-55 to +150
300
FQN1N60CTA
50
140
©2005 Fairchild Semiconductor Corporation
FQN1N60C Rev C1
1
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Unit
oC/W
www.fairchildsemi.com
1 page  
Same Type
50KΩ as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
IG = const.
DUT
Charge
Figure 12. Gate Charge Test Circuit & Waveform
VGS
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
Figure 13. Resistive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS = --21-- L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
VGS
DUT
VDD
VDS (t)
t p t p Time
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2005 Fairchild Semiconductor Corporation
FQN1N60C Rev C1
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet FQN1N60C.PDF ] | |
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