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PDF FS6808DG Data sheet ( Hoja de datos )

Número de pieza FS6808DG
Descripción Low Standby Power High Performance PWM Controller
Fabricantes American First Semiconductor 
Logotipo American First Semiconductor Logotipo



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Low Standby Power High Performance PWM Controller
FS6808DG
General Description
The FS6808DG represents a major leap towards achieving low standby power in medium−to−high
power Switched−Mode Power Supplies such as notebook adapters, off−line battery chargers and
consumer electronics equipment. the FS6808DG contains all needed control functionality to build a rugged
and efficient power supply. The FS6808DG is a current mode controller with internal ramp compensation.
Among the unique features offered by the FS6808DG is an event management scheme that can disable the
front−end PFC circuit during standby, thus reducing the no load power consumption. The FS6808DG itself
goes into cycle skipping at light loads while limiting peak current so that no acoustic noise is generated.
The FS6808DG has a high−voltage (500V) startup circuit that eliminates external components and reduces
power consumption. The FS6808DG also features an internal latching function that can be used for OVP
protection. True overload protection, internal 2.5 ms soft−start, internal leading edge blanking, internal
frequency dithering for low EMI are some of the other important features offered by the FS6808DG. offered
in SOP-8 package.
Features
Internal High−Voltage(500V) Startup Current Source for Loss−Less Startup
MAX 18V Power Supply Voltage
Current−Mode Operation with Internal Ramp Compensation
Extremely Low No−Load Standby Power
Direct Connection to PFC Controller for Improved No−Load Standby Power
Internal Leading Edge Blanking
Latched Primary Overcurrent and Overvoltage Protection
Short−Circuit Protection Independent of Auxiliary Level
+500 mA/−800 mA Peak Current Drive Capability
@ 2010 Copyright By American First Semiconductor
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FS6808DG pdf
FS6808DG
Electrical CharacteristicsTa=25℃, VCC=13V , VPIN8 = 30V ,)
Characteristic
Symbol Pin
Condition
Min Tye Max Unit
Turn−On Threshold
VCCOFF
Minimum Operating Voltage after
Turn−On
VCCMIN
VCC Decreasing Level at which the
Latch−Off Phase Ends
VCCLATCH
VCC Level at which the Internal
Logic gets Reset
VCCRESET
Internal IC Consumption, No
Output Load on Pin 6
ICC1
Internal IC Consumption, 1.0 nF
Output Load on Pin 6
ICC2
Internal IC Consumption,
Latch−Off Phase
ICC3
High−Voltage Current Source, 1.0
nF Load
IC1
High−Voltage Current Source
IC2
6
6
6
6
6
6
6
8
8
Minimum Startup Voltage
VHVMIN 8
Startup Leakage
Output Voltage Rise−Time
ILEAKAGE
TR
8
5
Output Voltage Fall−Time
TF 5
Source Resistance
Sink Resistance
Output Impedance
Input Bias Current
Maximum Internal Current Setpoint
ROH
ROl
RPFC
IIB
ILimit
Over voltage protection
Vlatch
Leading Edge Blanking Duration
Default Internal Setpoint for Skip
Cycle Operation and Standby
Detection
TLEB
Vskip
Default Internal Setpoint to Leave
Standby
Vstby−out
Opto Current Source
Isop
Soft start
Ss
Temperature Shutdown
Temperature Shutdown Hysteresis
Oscillation Frequency
Internal Modulation Swing
FOSC
Maximum Duty−Cycle
Dmax
Internal Resistor
Rup
Ramp Compensation Sawtooth
Amplitude
5
5
1
3
3
3
2
2
2
-
VFB=2.0V
VCC Going Up
11.6 12.6 13.6 V
7.0 7.7 8.4 V
VFB=3.5V
5.0 5.6 6.2 V
- 4.0 - V
VFB=2.5V
0.6 1.1 1.8 mA
PIN5 CL = 1.0 nF
VFB=2.5V
1.3 2.2 3 mA
VCC=7V
400 680 1000 uA
VCCOFF-0.2V
PIN5 CL = 1.0 nF
VCC=0V
IC1 = 0.5 mA,
VCCOFF −0.2 V,
VFB = 2.5 V
VHV=500V
PIN5 CL = 1.0 nF,
10−90%
1.8 3.2 4.2 mA
1.8 4.4 5.6 mA
− 20 23 V
10 30 80 uA
- 40 - nS
PIN5 CL = 1.0 nF,
10−90%
- 15 - nS
RL=300Ω, VFB = 2.5 V 6.0 12.3 25
VPIN5=1V, VFB = 3.5 V 3.0 7.5 18
RLPIN1=680 Ω 6.0 11.7 23
Ω
Ω
Ω
− 0.02 − uA
1.010 1.063 1.116 V
2.7 3.0 3.3 V
100 200 350 nS
VFB Increase
600 750 900 mV
VFB Decrease
1.0 1.25 1.5 V
200 235 270 uA
− 2.5 − mS
150 165 150
25
90 100 110 KHz
±6.4 %
75 80 85 %
9.0 18 36 KΩ
2.3 V
www.First-semi.com
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