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PDF HCC4035B Data sheet ( Hoja de datos )
| Número de pieza | HCC4035B | |
| Descripción | 4-STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HCC4035B (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
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HCC/HCF4035B
4-STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER
. 4-STAGE CLOCKED SHIFT OPERATION
. SYNCHRONOUS PARALLEL ENTRY ON ALL 4
STAGES
. JK INPUTS ON FIRST STAGE
. ASYNCHRONOUS TRUE/COMPLEMENT CON-
TROL ON ALL OUTPUTS
. STATIC FLIP-FLOP OPERATION ; MASTER-
SLAVE CONFIGURATION
. BUFFERED INPUTS AND OUTPUTS
. HIGH SPEED 12MHz (typ.) AT VDD = 10V
. QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
. STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
. 5V, 10V, AND 15V PARAMETRIC RATINGS
. INPUT CURR 100nA AT 18V AND 25°C FOR
HCC DEVICE
. 100% TESTED FOR QUIESCENT CURRENT
. MEETS ALL REQUIREMENTS OF JEDECTEN-
TATIVE STANDARD N°. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
Whith JK inputs connected together, the first stage
becomes a D flip-flop. An asynchronous common
RESET is also provided.
EY F
(Plastic Package) (Ceramic Frit Seal Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC4035BF
HCF4035BM1
HC F 40 35B EY
HCF4035BC1
DESCRIPTION
The HCC4035B (extended temperature range) and
HCF4035B (intermediate temperature range) are
monolithic integrated circuit, available in 16-lead
dual in-line plastic or ceramic package and plastic
micro package. The HCC/HCF4035B is a four-
stage clocked signal serial register with provision for
synchronous PARALLEL inputs to each stage and
SERIAL inputs to the first stage via JK logic. Regis-
ter stages 2, 3, and 4 are coupled in a serial D flip-
flop configuration when the register is in the serial
mode (PARALLEL/SERIAL control low). Parallel
entry into each register stage is permitted when the
PARALLEL/SERIAL control is high. In the parallel or
serial mode information is transferred on positive
clock transitions. When the TRUE/COMPLEMENT
control is high, the true contents of the register are
available at the output terminals. When the
TRUE/COMPLEMENT control is low, the outputs
are the complements of the data in the register. The
TRUE/COMPLEMENT control functions asyn-
chronously with respect to the CLOCK signal. JK
input logic is provided on the first stage SERIAL
input to minimize logic requirements particularly in
counting and sequence-generation applications.
PIN CONNECTIONS
July 1989
1/14
1 page  
HCC/HCF4035B
DYNAMIC ELECTRICAL CHARACTERISTICS (T amb = 25°C, CL = 50pF, RL = 200kΩ,
typical temperature coefficient for all VDD = 0.3%/°C, all input rise and fall time = 20ns)
Symbol
Parameter
CLOCKED OPERATION
t PL H, t PHL Propagation Delay Time
t T HL, t TL H Transition Time
Test Conditions
V al ue
V D D (V) Min. Typ. Max.
5 250 500
10 100 200
15 75 150
5 100 200
10 50 100
15 40 80
f CL Maximum Clock Input Frequency
5 24
10 6 12
15 8 16
tW Clock Pulse Width
tr, tf Clock Input Rise or Fall Time
5 100 200
10 45 90
15 30 60
5 15
10 15
tsetup
Data Setup Time J/K Lines
15 15
5 110 220
10 40 80
15 30 60
ts e tu p Data Setup Time Parallel-In-Lines
5 70 140
10 25 50
15 20 40
RESET OPERATION
t PL H, t PHL Propagation Delay Time
tW Reset Pulse Width
5 230 460
10 100 200
15 80 160
5 125 250
10 55 110
15 40 40
Unit
ns
ns
MHz
ns
µs
ns
ns
ns
ns
5/14
5 Page 
DIM.
A
B
D
E
e3
F
G
H
L
M
N
P
Q
HCC/HCF4035B
Ceramic DIP16/1 MECHANICAL DATA
MIN.
0.38
2.29
0.4
1.17
0.22
0.51
7.8
mm
TYP.
3.3
17.78
MAX.
20
7
2.79
0.55
1.52
0.31
1.27
10.3
8.05
5.08
MIN.
0.015
0.090
0.016
0.046
0.009
0.020
0.307
inch
TYP.
0.130
0.700
MAX.
0.787
0.276
0.110
0.022
0.060
0.012
0.050
0.406
0.317
0.200
P053D
11/14
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet HCC4035B.PDF ] | |
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