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PDF FDMA8884 Data sheet ( Hoja de datos )

Número de pieza FDMA8884
Descripción Single N-Channel PowerTrench MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDMA8884 Hoja de datos, Descripción, Manual

FDMA8884
Single N-Channel Power Trench® MOSFET
30 V, 6.5 A, 23 mΩ
May 2014
Features
General Description
„ Max rDS(on) = 23 mΩ at VGS = 10 V, ID = 6.5 A
„ Max rDS(on) = 30 mΩ at VGS = 4.5 V, ID = 6.0 A
„ High performance trench technology for extremely low rDS(on)
„ Fast switching speed
„ RoHS Compliant
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced Power Trench® process that has
been optimized for rDS(on) switching performance.
Application
„ Primary Switch
Pin 1
Drain
DD G
Source
DD S
MicroFET 2X2 (Bottom View)
Bottom Drain Contact
DD
DD
GS
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited) TC = 25 °C
-Continuous
TA = 25 °C
-Pulsed
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 3)
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
30
±20
8.0
6.5
25
1.9
0.7
-55 to +150
Units
V
V
A
W
°C
RθJA
RθJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
65
180
°C/W
Device Marking
884
Device
FDMA8884
Package
MicroFET 2x2
Reel Size
7 ’’
Tape Width
8 mm
Quantity
3000 units
©2012 Fairchild Semiconductor Corporation
FDMA8884 Rev.C5
1
www.fairchildsemi.com

1 page




FDMA8884 pdf
Dimensional Outline and Pad Layout
0.05 C
2X
2.0
A
B
2.0
PIN#1 IDENT
TOP VIEW
0.05 C
2X
0.10 C
0.08 C
SEATING
PLANE
SIDE VIEW
C
(0.15)
PIN #1 IDENT
1
(0.50)
(0.20)4X
3
(6X)
(0.50)
64
0.65
1.30
BOTTOM VIEW
0.10
0.05
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM
TO JEDEC MO-229 REGISTRATION
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
E. DRAWING FILENAME: MKT-MLP06Lrev4.
(6X)
CAB
C
1.70
1.00
6
(0.20)
4
No Traces
allowed in
this Area
1.05 2.30
0.47(6X)
13
0.65 0.40(6X)
RECOMMENDED
LAND PATTERN OPT 1
1.70
1.00
6
0.45
(0.20)
4
1.05 0.66
2.30
0.47(6X)
1
0.65
3
0.40(7X)
RECOMMENDED
LAND PATTERN OPT 2
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, spe-
cifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_MLDEB-C06
©2012 Fairchild Semiconductor Corporation
FDMA8884 Rev.C5
5
www.fairchildsemi.com

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