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Número de pieza | F10NK50Z | |
Descripción | STF10NK50Z | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
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No Preview Available ! STF10NK50Z
N-channel 500 V, 0.55 Ω, 9 A Zener-protected SuperMESH™
Power MOSFET in TO-220FP package
Datasheet — production data
Features
Order code VDSS RDS(on) max ID
STF10NK50Z 500 V < 0.7 Ω 9 A
PTOT
30 W
■ Extremely high dv/dt capability
■ 100% avalanche tested
■ Gate charge minimized
■ Very low intrinsic capacitance
Applications
■ Switching application
Description
This device is an N-channel Zener-protected
Power MOSFET developed using
STMicroelectronics’ SuperMESH™ technology,
achieved through optimization of ST’s well
established strip-based PowerMESH™ layout. In
addition to a significant reduction in on-
resistance, this device is designed to ensure a
high level of dv/dt capability for the most
demanding applications.
3
2
1
TO-220FP
Figure 1. Internal schematic diagram
D(2)
G(1)
Table 1. Device summary
Order code
STF10NK50Z
Marking
F10NK50Z
S(3)
AM01476v1
Package
TO-220FP
Packaging
Tube
March 2012
This is information on a product in full production.
Doc ID 022992 Rev 1
1/13
www.st.com
13
1 page STF10NK50Z
Table 7. Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay Time
Fall time
Electrical characteristics
Test conditions
VDD=250 V, ID=4.5A,
RG=4.7Ω, VGS=10V
See Figure 16
Min. Typ. Max. Unit
19 ns
--
17 ns
43 ns
--
15 ns
Table 8. Source drain diode
Symbol
Parameter
Test conditions
ISD Source-drain current
ISDM(1) Source-drain current (pulsed)
VSD(2) Forward on voltage
ISD=9 A, VGS=0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=9 A,
di/dt = 100 A/µs,
VDD=35 V
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=9 A,
di/dt = 100 A/µs,
VDD=35 V, Tj=150 °C
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
Min Typ. Max Unit
- 9A
- 36 A
- 1.6 V
268
- 1.83
13.7
ns
µC
A
343
- 2.6
15.15
ns
µC
A
Table 9. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
BVGSO(1) Gate-source breakdown voltage Igs=±1 mA (open drain) 30 - V
1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
Doc ID 022992 Rev 1
5/13
5 Page STF10NK50Z
Figure 20. TO-220FP drawing
Package mechanical data
Doc ID 022992 Rev 1
7012510_Rev_K_B
11/13
11 Page |
Páginas | Total 13 Páginas | |
PDF Descargar | [ Datasheet F10NK50Z.PDF ] |
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F10NK50Z | STF10NK50Z | STMicroelectronics |
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