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PDF HC138 Data sheet ( Hoja de datos )
| Número de pieza | HC138 | |
| Descripción | 1-of-8 Decoder/Demultiplexer | |
| Fabricantes | System Logic Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HC138 (archivo pdf) en la parte inferior de esta página. Total 5 Páginas | ||
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SL74HC138
1-of-8 Decoder/Demultiplexer
High-Performance Silicon-Gate CMOS
The SL74HC138 is identical in pinout to the LS/ALS138. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
The SL74HC138 decodes a three-bit Address to one-of-eight active-
low outputs. This device features three Chip Select inputs, two active-
low and one active-high to facilitate the demultiplexing, cascading, and
chip-selecting functions. The demultiplexing function is accomplished
by using the Address inputs to select the desired device output; one
of the Chip Selects is used as a data input while the other Chip Selects
are held in their active states.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
SL74HC138N Plastic
SL74HC138D SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =VCC
PIN 8 = GND
SLS
System Logic
Semiconductor
FUNCTION TABLE
Inputs
Outputs
CS1CS2CS3 A2 A1A0
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
XXH
XHX
LXX
XXX
XXX
XXX
H H H HHHHH
H H H HHHHH
H H H HHHHH
HLL
HLL
HLL
HLL
LLL
LLH
LHL
LHH
L H H HHHHH
H L H HHHHH
H H L HHHHH
H H H LHHHH
HLL
HLL
HLL
HLL
HLL
HLH
HHL
HHH
H H H HLHHH
H H H HHLHH
H H H HHHLH
H H H HHHHL
H = high level (steady state)
L = low level (steady state)
X = don’t care
1 page  
SL74HC138
Figure 3. Switching Waveforms
Figure 4. Test Circuit
EXPANDED LOGIC DIAGRAM
SLS
System Logic
Semiconductor
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet HC138.PDF ] | |
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