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HB54R1G9F2U fiches techniques PDF

Elpida Memory - 1GB Registered DDR SDRAM DIMM

Numéro de référence HB54R1G9F2U
Description 1GB Registered DDR SDRAM DIMM
Fabricant Elpida Memory 
Logo Elpida Memory 





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HB54R1G9F2U fiche technique
DATA SHEET
1GB Registered DDR SDRAM DIMM
HB54R1G9F2U-A75B/B75B/10B (128M words × 72 bits, 2 Banks)
Description
Features
The HB54R1G9F2U is a 128M × 72 × 2 bank Double
Data Rate (DDR) SDRAM Module, mounted 36 pieces
of 256Mbits DDR SDRAM (HM5425401BTB) sealed in
TCP package, 1 piece of PLL clock driver, 2 pieces of
register driver and 1 piece of serial EEPROM (2k bits
EEPROM) for Presence Detect (PD). Read and write
operations are performed at the cross points of the CK
and the /CK. This high-speed data transfer is realized
by the 2-bit prefetch-pipelined architecture. Data
strobe (DQS) both for read and write are available for
high speed and reliable data bus design. By setting
extended mode register, the on-chip Delay Locked
Loop (DLL) can be set enable or disable. An outline of
the products is 184-pin socket type package (dual lead
out). Therefore, it makes high density mounting
possible without surface mount technology. It provides
common data inputs and outputs. Decoupling
capacitors are mounted beside each TCP on the
module board.
Note: Do not push the cover or drop the modules in
order to protect from mechanical defects, which
would be electrical defects.
184-pin socket type package (dual lead out)
Outline: 133.35mm (Length) × 30.48mm (Height) ×
4.80mm (Thickness)
Lead pitch: 1.27mm
2.5V power supply (VCC/VCCQ)
SSTL-2 interface for all inputs and outputs
Clock frequency: 143MHz/133MHz/125MHz (max.)
Data inputs and outputs are synchronized with DQS
4 banks can operate simultaneously and
independently (Component)
Burst read/write operation
Programmable burst length: 2, 4, 8
Burst read stop capability
Programmable burst sequence
Sequential
Interleave
Start addressing capability
Even and Odd
Programmable /CAS latency (CL): 3, 3.5
8192 refresh cycles: 7.8µs (8192/64ms)
2 variations of refresh
Auto refresh
Self refresh
Document No. E0192H30 (Ver. 3.0)
Date Published September 2002 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2001-2002
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.

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