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PDF IAQX10M Data sheet ( Hoja de datos )
| Número de pieza | IAQX10M | |
| Descripción | QXGA Color TFT/LCD Module | |
| Fabricantes | IDTech | |
| Logotipo |  |
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Engineering Specification
Engineering Specification
Type 15.0 QXGA Color TFT/LCD Module
Model Name:IAQX10M
Document Control Number : OEM I-910M-03
Note:Specification is subject to change without notice. Consequently it is better to contact to
International Display Technology before proceeding with the design
of your product incorporating this module.
Sales Support
International Display Technology
(C) Copyright International Display Technology 2001, 2002 All Rights reserved.
June 17,2002
OEM I-910M-03
1/30
1 page  
Engineering Specification
2.0 General Description
This specification applies to the Type 15.0 Color TFT/LCD Module 'IAQX10M'.
This module is designed for a display unit of a monitor application.
The screen format and electrical interface are intended to support the QXGA(2048(H) x 1536(V)) screen.
Support color is native 262K colors(RGB 6-bit data driver).
All input signals are LVDS(Low Voltage Differential Signaling) interface compatible.
This module does not contain an inverter card for backlight.
2.1 Characteristics
The following items are characteristics summary on the table under 25 degree C condition:
CHARACTERISTICS ITEMS
SPECIFICATIONS
Screen Diagonal [mm]
380
Pixels H x V
2048(x3) x 1536
Active Area [mm]
304.1(H) x 228.1(V)
Pixel Pitch [mm]
0.1485(per one triad) x 0.1485
Pixel Arrangement
R,G,B Vertical Stripe
Weight [grams]
1065 Typ., 1100 Max.
Physical Size [mm]
326.0(W) x 244.5(H) x 13.0(D) Typ./13.3(D) Max.
Display Mode
Normally Black
Support Color
White Luminance [cd/m2]
ICFL=7.0mA
Contrast Ratio
Native 262K colors(RGB 6-bit data driver)
200 Typ. (center)
180 Typ. (5 points average)
400 : 1 Typ.
Optical Rise Time + Fall Time [msec] 60 Typ.
Nominal Input Voltage VDD [Volt]
+3.3 Typ.
Power Consumption [Watt](VDD Line) 4.1 Typ., 5.2 Max.
Lamp Power Consumption [Watt]
ICFL=7.0mA
8.6 Typ. (W/o inverter loss)
Electrical Interface
8 pairs LVDS(Even/Odd R/G/B Data(6bit), 3sync signals, Clock)
Temperature Range [degree C]
Operating
Storage (Shipping)
0 to +50 (Note)
-20 to +60
Note : Max. Operating Temperature 50 degree C in the Spec means the temperature measured for the
point of the front surface of the LCD glass cell.
(C) Copyright International Display Technology 2001, 2002 All Rights reserved.
June 17,2002
OEM I-910M-03
5/30
5 Page 
Engineering Specification
5.3 Interface Signal Description
The module uses a pair of LVDS receiver SN75LVDS86(Texas Instruments) compatible. LVDS is a differential
signal technology for LCD interface and high speed data transfer device. Transmitter shall be SN75LVDS84/85
or compatible.
PIN #
SIGNAL
NAME
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Note :
1.
2.
3.
4.
GND
VDD
VDD
Reserved
Reserved
VDD
VDD
ReIN0-
ReIN0+
GND
ReIN1-
ReIN1+
GND
ReIN2-
ReIN2+
GND
ReCLKIN-
ReCLKIN+
GND
RoIN0-
RoIN0+
GND
RoIN1-
RoIN1+
GND
RoIN2-
RoIN2+
GND
RoCLKIN-
RoCLKIN+
Ground
+3.3V Power Supply
+3.3V Power Supply
Reserved
Reserved
+3.3V Power Supply
+3.3V Power Supply
Negative LVDS differential data input (Even R0-R5, G0)
Positive LVDS differential data input (Even R0-R5, G0)
Ground
Negative LVDS differential data input (Even G1-G5, B0-B1)
Positive LVDS differential data input (Even G1-G5, B0-B1)
Ground
Negative LVDS differential data input (Even B2-B5, HSYNC, VSYNC, DSPTMG)
Positive LVDS differential data input (Even B2-B5, HSYNC, VSYNC, DSPTMG)
Ground
Negative LVDS differential clock input (Even)
Positive LVDS differential clock input (Even)
Ground
Negative LVDS differential data input (Odd R0-R5, G0)
Positive LVDS differential data input (Odd R0-R5, G0)
Ground
Negative LVDS differential data input (Odd G1-G5, B0-B1)
Positive LVDS differential data input (Odd G1-G5, B0-B1)
Ground
Negative LVDS differential data input (Odd B2-B5)
Positive LVDS differential data input (Odd B2-B5)
Ground
Negative LVDS differential clock input (Odd)
Positive LVDS differential clock input (Odd)
Input signals of odd and even clock shall be the same timing.
The module uses a 100ohm resistor between positive and negative data lines of each receiver input.
Even: First Pixel , Odd: Second Pixel
'Reserved' pins are not allowed to connect any other line.
(C) Copyright International Display Technology 2001, 2002 All Rights reserved.
June 17,2002
OEM I-910M-03
11/30
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet IAQX10M.PDF ] | |
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