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PDF FDS6900AS Data sheet ( Hoja de datos )

Número de pieza FDS6900AS
Descripción Dual N-Ch PowerTrench SyncFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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May 2005
FDS6900AS
Dual N-Ch PowerTrench® SyncFET
General Description
The FDS6900AS is designed to replace two single SO-
8 MOSFETs and Schottky diode in synchronous DC:DC
power supplies that provide various peripheral voltages
for notebook computers and other battery powered
electronic devices. FDS6900AS contains two unique
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency.
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the low-
side switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode
using Fairchild’s monolithic SyncFET technology.
Features
Q2: Optimized to minimize conduction losses
Includes SyncFET Schottky body diode
8.2A, 30V
RDS(on) = 22m@ VGS = 10V
RDS(on) = 28m@ VGS = 4.5V
Q1: Optimized for low switching losses
Low Gate Charge (11nC typical)
6.9A, 30V
RDS(on) = 27m@ VGS = 10V
RDS(on) = 34m@ VGS = 4.5V
100% RG (Gate Resistance) Tested
SD1D2
SD1D2
SD1D2
DG1
SO-8
Pin 1 SO-
DS1DS1 GS2SG2
1
2 Q1
3
Q2
4
8
7
6
5
Dual N-Channel SyncFet
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, TSTG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
(Note 1a)
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS6900AS
FDS6900AS
13”
FDS6900AS
FDS6900AS_NL (Note 4)
13”
©2005 Fairchild Semiconductor Corporation
Q2 Q1
30 30
±20 ±20
8.2 6.9
30 20
2
1.6
1
0.9
–55 to +150
Units
V
V
A
W
°C
78 °C/W
40 °C/W
Tape width
12mm
12mm
Quantity
2500 units
2500 units
FDS6900AS Rev B(X)

1 page




FDS6900AS pdf
Typical Characteristics: Q2
10
ID =8.2A
8
6
4
VDS = 10V
20V
15V
2
0
0 3 6 9 12
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
100
RDS(ON) LIMIT
10
1
1ms
10ms
100ms
1s
10s
DC
100µs
VGS = 10V
0.1 SINGLE PULSE
RθJA = 135oC/W
TA = 25oC
0.01
0.1
1 10
VDS, DRAIN-SOURCE VOLTAGE (V)
100
Figure 9. Maximum Safe Operating Area.
800
f = 1MHz
VGS = 0 V
600
Ciss
400
Coss
200
Crss
0
0 5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics.
50
SINGLE PULSE
RθJA = 135°C/W
40 TA = 25°C
30
20
10
0
0.001
0.01
0.1 1 10
t1, TIME (sec)
100
Figure 10. Single Pulse Maximum
Power Dissipation.
1000
1
0.1
0.01
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
t1, TIME (sec)
1
RθJA(t) = r(t) * RθJA
RθJA = 135 °C/W
P(pk)
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
10 100 1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6900AS Rev B (X)

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